JG

Johannes Grad

CS Cadence Design Systems: 2 patents #781 of 2,263Top 35%
📍 Pacifica, CA: #283 of 576 inventorsTop 50%
🗺 California: #185,134 of 386,348 inventorsTop 50%
Overall (All Time): #1,781,693 of 4,157,543Top 45%
2
Patents All Time

Issued Patents All Time

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
12106032 Port generation based on layout connectivity information Mikhail Prikhodko, Shritam Mohanty, Patrick Peiqi Ho 2024-10-01
9053289 Method and system for implementing an improved interface for designing electronic layouts Gilles S. C. Lamant, Henry Yu, Simon Simonian, Jeff Taraldson 2015-06-09