Issued Patents All Time
Showing 1–25 of 44 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10445290 | System and method for a smart configurable high performance interactive log file viewer | Graeme Bunyan | 2019-10-15 |
| 10223484 | Spice model bin inheritance mechanism | Richard J. O'Donovan, Saibal Saha, Jushan Xie | 2019-03-05 |
| 10133653 | Recording and playback of trace and video log data for programs | David Varghese | 2018-11-20 |
| 9589085 | Systems and methods for viewing analog simulation check violations in an electronic design automation framework | Keith Dennison, Vuk Borich | 2017-03-07 |
| 9501598 | System and method for assertion publication and re-use | Vuk Borich, Keith Dennison | 2016-11-22 |
| 9355130 | Method and system for component parameter management | James McMahon | 2016-05-31 |
| 9245088 | System and method for data mining safe operating area violations | — | 2016-01-26 |
| 9213787 | Simulation based system and method for gate oxide reliability enhancement | Richard J. O'Donovan | 2015-12-15 |
| 9182948 | Method and system for navigating hierarchical levels using graphical previews | — | 2015-11-10 |
| 9047424 | System and method for analog verification IP authoring and storage | Mark D. Baker, Keith Dennison | 2015-06-02 |
| 9038008 | System and method for containing analog verification IP | Jaideep Mukherjee, Richard J. O'Donovan | 2015-05-19 |
| 9032347 | System and method for automated simulator assertion synthesis and digital equivalence checking | — | 2015-05-12 |
| 9026963 | System and method for fault sensitivity analysis of mixed-signal integrated circuit designs | Ilya Yusim, Zhipeng Liu | 2015-05-05 |
| 9020277 | Image-based stimulus for circuit simulation | David Varghese | 2015-04-28 |
| 9009635 | System and method for simulator assertion synthesis and digital equivalence checking | — | 2015-04-14 |
| 8996348 | System and method for fault sensitivity analysis of digitally-calibrated-circuit designs | Victor Zhuk | 2015-03-31 |
| 8954307 | Chained programming language preprocessors for circuit simulation | Richard J. O'Donovan | 2015-02-10 |
| 8949203 | Verification of design libraries and databases | James McMahon, Pei-Der Tseng | 2015-02-03 |
| 8875077 | Fault sensitivity analysis-based cell-aware automated test pattern generation flow | Bassilios Petrakis, Kevin Chou | 2014-10-28 |
| 8863050 | Efficient single-run method to determine analog fault coverage versus bridge resistance | Victor Zhuk | 2014-10-14 |
| 8838559 | Data mining through property checks based upon string pattern determinations | — | 2014-09-16 |
| 8832612 | Netlisting analog/mixed-signal schematics to VAMS | Prabal Kanti Bhattacharya, Timothy Martin O'Leary | 2014-09-09 |
| 8813004 | Analog fault visualization system and method for circuit designs | Hao Ji, Joseph Michael Swenton | 2014-08-19 |
| 8762906 | Method, system, and computer program product for implementing multi-power domain digital / mixed signal verification and low power simulation | Arnold Ginetti, Madhur Sharma | 2014-06-24 |
| 8732636 | Method, system, and computer program product for implementing multi-power domain digital / mixed-signal verification and low power simulation | Arnold Ginetti, Madhur Sharma | 2014-05-20 |