JX

Jushan Xie

CS Cadence Design Systems: 5 patents #303 of 2,263Top 15%
📍 Pleasanton, CA: #1,032 of 3,062 inventorsTop 35%
🗺 California: #106,790 of 386,348 inventorsTop 30%
Overall (All Time): #971,794 of 4,157,543Top 25%
5
Patents All Time

Issued Patents All Time

Showing 1–5 of 5 patents

Patent #TitleCo-InventorsDate
10621386 Method of bias temperature instability calculation and prediction for MOSFET and FinFET Alvin Chen, Si-Yu Liao, Chunyi HUANG, Tianlei Guo, Yanhui Li +4 more 2020-04-14
10223484 Spice model bin inheritance mechanism Donald J. O'Riordan, Richard J. O'Donovan, Saibal Saha 2019-03-05
9411918 Simplified device model extension using subcircuits John P. O'Donovan, Saibal Saha 2016-08-09
8954908 Fast monte carlo statistical analysis using threshold voltage modeling Hongzhou Liu, Michael Tian, An-Chang Deng 2015-02-10
6560755 Apparatus and methods for modeling and simulating the effect of mismatch in design flows of integrated circuits Xisheng Zhang, James Chieh-Tsung Chen, Zhihong Liu, Xucheng Pang, Jingkun Fang 2003-05-06