Issued Patents All Time
Showing 1–18 of 18 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12082743 | Grinder, coffee machine and method for grinding coffee beans | Armin HENSEL, Bernd Buchholz | 2024-09-10 |
| 11849878 | Brewing unit for a coffee machine | Armin HENSEL, Bernd Buchholz | 2023-12-26 |
| 11321514 | Macro clock latency computation in multiple iteration clock tree synthesis | Ben Thomas Beaumont, Zhuo Li | 2022-05-03 |
| 10960591 | Method for performing a cyclic production process | Daniel Paul Fick, Guenter Haag, Philipp Liedl | 2021-03-30 |
| 10929589 | Generating routing structure for clock network based on edge intersection detection | Zhuo Li | 2021-02-23 |
| 10836088 | Method for reproducing injection molded parts of quality and injection molding unit for performing the method | Daniel Paul Fick, Philipp Liedl | 2020-11-17 |
| 10706202 | Devices and methods for balanced routing tree structures | Zhuo Li | 2020-07-07 |
| 10643014 | Irregular sink arrangement for balanced routing tree structures | Zhuo Li | 2020-05-05 |
| 10380287 | Systems and methods for modifying a balanced clock structure | Zhuo Li, Charles J. Alpert | 2019-08-13 |
| 10282506 | Systems and methods for clock tree clustering | Zhuo Li, Charles J. Alpert | 2019-05-07 |
| 7716613 | Method for classifying errors in the layout of a semiconductor circuit | Thomas Harold Roessler | 2010-05-11 |
| 7475376 | Method and system for performing non-local geometric operations for the layout design of a semiconductor device | Alexander Iwan Seidl | 2009-01-06 |
| 7310791 | Method for correcting layout errors | Uwe Mueller | 2007-12-18 |
| 7207016 | Method for classifying errors in the layout of a semiconductor circuit | Thomas Harold Roessler | 2007-04-17 |
| 7154522 | Quality printing method, printing machine, and corresponding printing substance | Udo Lehmann | 2006-12-26 |
| 6834564 | Accelerator pedal module | Sandra Huesges, Mario Huesges, Radek Caba | 2004-12-28 |
| 6493865 | Method of producing masks for fabricating semiconductor structures | Werner Fischer, Burkhard Ludwig, Jorg Thiele | 2002-12-10 |
| 5135583 | Phosphating process | Horst Gehmecker, Thomas Kolberg, Gerhard Muller | 1992-08-04 |