AK

Anjna Khanna

CS Cadence Design Systems: 3 patents #541 of 2,263Top 25%
Overall (All Time): #1,505,138 of 4,157,543Top 40%
3
Patents All Time

Issued Patents All Time

Showing 1–3 of 3 patents

Patent #TitleCo-InventorsDate
9305133 System and method for selective application and reconciliation of hierarchical ordered sets of circuit design constraints within a circuit design editor Sandipan Ghosh 2016-04-05
9064063 Methods, systems, and articles of manufacture for implementing interactive, real-time checking or verification of complex constraints Henry Yu, Joshua Baudhuin, Regis Colwell, Harsh Deshmane, Elias Lee Fallon +8 more 2015-06-23
8694943 Methods, systems, and computer program product for implementing electronic designs with connectivity and constraint awareness Henry Yu, Roland Ruehl, Elias Lee Fallon, Regis Colwell, Joshua Baudhuin +8 more 2014-04-08