AM

Anil Malik

CS Cadence Design Systems: 6 patents #235 of 2,263Top 15%
Overall (All Time): #806,028 of 4,157,543Top 20%
6
Patents All Time

Issued Patents All Time

Showing 1–6 of 6 patents

Patent #TitleCo-InventorsDate
11592482 Scan channel slicing for compression-mode testing of scan chains Sameer Chakravarthy Chillarige, Bharath Nandakumar 2023-02-28
10996270 System and method for multiple device diagnostics and failure grouping Sameer Chakravarthy Chillarige, Joe Swenton, Krishna Vijaya Chakravadhanula 2021-05-04
10338137 Highly accurate defect identification and prioritization of fault locations Sameer Chakravarthy Chillarige, Sharjinder Singh, Joseph Michael Swenton 2019-07-02
10180457 System and method performing scan chain diagnosis of an electronic design Sameer Chakravarthy Chillarige, Sharjinder Singh, Joseph Michael Swenton 2019-01-15
9864004 System and method for diagnosing failure locations in electronic circuits Sameer Chakravarthy Chillarige, Brion Keller, Joseph Michael Swenton, Sharjinder Singh 2018-01-09
9400311 Method and system of collective failure diagnosis for multiple electronic circuits Sameer Chakravarthy Chillarige, Sharjinder Singh, Joseph Michael Swenton, Gilbert Vandling 2016-07-26