LM

Laurent Moll

Broadcom: 30 patents #273 of 9,346Top 3%
Oracle: 19 patents #474 of 14,854Top 4%
QU Qualcomm: 16 patents #1,353 of 12,104Top 15%
CC Compaq Computer: 2 patents #518 of 1,604Top 35%
NV NVIDIA: 2 patents #2,855 of 7,811Top 40%
HP HP: 1 patents #8,774 of 16,619Top 55%
📍 San Jose, CA: #572 of 32,062 inventorsTop 2%
🗺 California: #4,640 of 386,348 inventorsTop 2%
Overall (All Time): #30,626 of 4,157,543Top 1%
68
Patents All Time

Issued Patents All Time

Showing 26–50 of 68 patents

Patent #TitleCo-InventorsDate
7873788 Re-fetching cache memory having coherent re-fetching Peter N. Glaskowsky, Joseph B. Rowlands 2011-01-18
7802073 Virtual core management Yu Qing Cheng, John G. Favor, Carlos Puchol, Seungyoon Peter Song, Peter N. Glaskowsky +2 more 2010-09-21
7797512 Virtual core management Yu Qing Cheng, John G. Favor, Peter N. Glaskowsky, Carlos Puchol, Seungyoon Peter Song 2010-09-14
7797563 System and method for conserving power Joseph B. Rowlands 2010-09-14
7680140 Systems including packet interfaces, switches, and packet DMA circuits for splitting and merging packet streams Barton Sano, Manu Gulati 2010-03-16
7663961 Reduced-power memory with per-sector power/ground control and early address Joseph B. Rowlands, John G. Favor, Daniel Fung 2010-02-16
7647452 Re-fetching cache memory enabling low-power modes Peter N. Glaskowsky, Joseph B. Rowlands 2010-01-12
7627730 System and method for optimizing a memory controller 2009-12-01
7609718 Packet data service over hyper transport link(s) Manu Gulati, Barton Sano 2009-10-27
7596148 Receiving data from virtual channels Manu Gulati, James B. Keller 2009-09-29
7593840 Peripheral bus switch having virtual peripheral bus and configurable host bridge 2009-09-22
7551645 Apparatus and method to receive and align incoming data including SPI data in a buffer to expand data width by utilizing a single read port and single write port memory device Manu Gulati 2009-06-23
7549091 Hypertransport exception detection and processing Joseph B. Rowlands 2009-06-16
7539819 Cache operations with hierarchy control 2009-05-26
7533242 Prefetch hardware efficiency via prefetch hint instructions Jorel Hartman, Peter N. Glaskowsky, Seungyoon Peter Song, John G. Favor 2009-05-12
7516274 Power conservation via DRAM access reduction Seungyoon Peter Song, Peter N. Glaskowsky, Yu Qing Cheng 2009-04-07
7490187 Hypertransport/SPI-4 interface supporting configurable deskewing Manu Gulati 2009-02-10
7443759 Reduced-power memory with per-sector ground control Joseph B. Rowlands, John G. Favor, Daniel Fung 2008-10-28
7424561 Systems using mix of packet, coherent, and noncoherent traffic to optimize transmission between systems Barton Sano, Joseph B. Rowlands, Manu Gulati 2008-09-09
7412570 Small and power-efficient cache that can provide data for background DNA devices while the processor is in a low-power state Yu Qing Cheng, Peter N. Glaskowsky, Seungyoon Peter Song 2008-08-12
7403525 Efficient routing of packet data in a scalable processing resource Barton Sano, Manu Gulati 2008-07-22
7404044 System and method for data transfer between multiple processors 2008-07-22
7380018 Peripheral bus transaction routing using primary and node ID routing information 2008-05-27
7366092 Hash and route hardware with parallel routing scheme Barton Sano, Thomas A. Petersen 2008-04-29
7346078 Processing of received data within a multiple processor device Manu Gulati, James B. Keller 2008-03-18