Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6500729 | Method for reducing dishing related issues during the formation of shallow trench isolation structures | Sailesh Chittipeddi, Arun K. Nanda | 2002-12-31 |
| 6358785 | Method for forming shallow trench isolation structures | Sailesh Chittipeddi, Arun K. Nanda | 2002-03-19 |
| 6218300 | Method and apparatus for forming a titanium doped tantalum pentaoxide dielectric layer using CVD | Pravin K. Narwankar, Turgut Sahin, Randall S. Urdahl, Patricia M. Liu | 2001-04-17 |
| 5328872 | Method of integrated circuit manufacturing using deposited oxide | Ajit S. Manocha, Virendra V. Rana, James Roberts | 1994-07-12 |
| 5147820 | Silicide formation on polysilicon | Sailesh Chittipeddi, Pradip K. Roy | 1992-09-15 |