SL

Saurabh Lodha

Applied Materials: 1 patents #4,780 of 7,310Top 70%
IN Intel: 1 patents #18,218 of 30,777Top 60%
📍 Jamkhed, OR: #1 of 1 inventorsTop 100%
Overall (All Time): #1,961,004 of 4,157,543Top 50%
2
Patents All Time

Issued Patents All Time

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
10043684 Self-limiting atomic thermal etching systems and methods Ranga Rao Arnepalli, Prerna Goradia, Robert Jan Visser, Nitin K. Ingle, Mikhail Korolik +1 more 2018-08-07
7861406 Method of forming CMOS transistors with dual-metal silicide formed through the contact openings Pushkar Ranade, Christopher P. Auth 2011-01-04