Issued Patents All Time
Showing 76–100 of 103 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5510294 | Method of forming vias for multilevel metallization | Girish Dixit, Alexander Kalnitsky | 1996-04-23 |
| 5493144 | Field progammable device with contact openings | Frank R. Bryant, Girish Dixit | 1996-02-20 |
| RE35111 | Local interconnect process for integrated circuits | Fu-Tai Liou, Yih-Shung Lin | 1995-12-05 |
| 5444019 | Semiconductor contact via structure and method | Girish Dixit, Che-Chia Wei | 1995-08-22 |
| 5440166 | Planarized isolation structure for CMOS devices | Girish Dixit, Robert O. Miller | 1995-08-08 |
| 5420453 | Intermediate structure for forming isolated regions of oxide | Robert Louis Hodges, Frank R. Bryant | 1995-05-30 |
| 5410176 | Integrated circuit with planarized shallow trench isolation | Fu-Tai Liou | 1995-04-25 |
| 5403777 | Semiconductor bond pad structure and method | Frank R. Bryant | 1995-04-04 |
| 5391520 | Method for forming local interconnect for integrated circuits | Fu-Tai Liou, Girish Dixit | 1995-02-21 |
| 5371410 | Integrated circuit metallization with zero contact enclosure requirements | Fu-Tai Liou | 1994-12-06 |
| 5369302 | Method to improve step coverage by contact reflow | Girish Dixit | 1994-11-29 |
| 5348901 | Interconnect and resistor for integrated circuits | Girish Dixit, Robert O. Miller | 1994-09-20 |
| 5319245 | Local interconnect for integrated circuits | Fu-Tai Liou, Girish Dixit | 1994-06-07 |
| 5317192 | Semiconductor contact via structure having amorphous silicon side walls | Girish Dixit, Che-Chia Wei | 1994-05-31 |
| 5309025 | Semiconductor bond pad structure and method | Frank R. Bryant | 1994-05-03 |
| 5285103 | Structure and method for contacts in CMOS devices | Frank R. Bryant, Girish Dixit | 1994-02-08 |
| 5270254 | Integrated circuit metallization with zero contact enclosure requirements and method of making the same | Fu-Tai Liou | 1993-12-14 |
| 5260229 | Method of forming isolated regions of oxide | Robert Louis Hodges, Frank R. Bryant, Che-Chia Wei | 1993-11-09 |
| 5244827 | Method for planarized isolation for CMOS devices | Girish Dixit, Robert O. Miller | 1993-09-14 |
| 5233135 | Interconnect for integrated circuits | Frank R. Bryant, Girish Dixit | 1993-08-03 |
| 5182627 | Interconnect and resistor for integrated circuits | Girish Dixit, Robert O. Miller | 1993-01-26 |
| 5164340 | Structure and method for contacts in CMOS devices | Frank R. Bryant, Girish Dixit | 1992-11-17 |
| 5146309 | Method for forming polycrystalline silicon contacts | Charles R. Spinner, III, Fu-Tai Liou | 1992-09-08 |
| 5130268 | Method for forming planarized shallow trench isolation in an integrated circuit and a structure formed thereby | Fu-Tai Liou | 1992-07-14 |
| 5108951 | Method for forming a metal contact | Fu-Tai Liou, Yih-Shung Lin, Girish Dixit, Che-Chia Wei | 1992-04-28 |