Issued Patents All Time
Showing 26–50 of 117 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9928069 | Predicated vector hazard check instruction | — | 2018-03-27 |
| 9875214 | Apparatus and method for transferring a plurality of data structures between memory and a plurality of vector registers | Mbou Eyole, Nigel John Stephens, Alex Klaiber, Charles E. Tucker | 2018-01-23 |
| 9817663 | Enhanced Macroscalar predicate operations | — | 2017-11-14 |
| 9715386 | Conditional stop instruction with accurate dependency detection | — | 2017-07-25 |
| 9632775 | Completion time prediction for vector instructions | — | 2017-04-25 |
| 9600280 | Hazard check instructions for enhanced predicate vector operations | — | 2017-03-21 |
| 9529574 | Auto multi-threading in macroscalar compilers | — | 2016-12-27 |
| 9471324 | Concurrent execution of heterogeneous vector instructions | — | 2016-10-18 |
| 9442734 | Completion time determination for vector instructions | — | 2016-09-13 |
| 9400651 | Early issue of null-predicated operations | — | 2016-07-26 |
| 9389860 | Prediction optimizations for Macroscalar vector partitioning loops | — | 2016-07-12 |
| 9390058 | Dynamic attribute inference | — | 2016-07-12 |
| 9367309 | Predicate attribute tracker | — | 2016-06-14 |
| 9354891 | Increasing macroscalar instruction level parallelism | — | 2016-05-31 |
| 9348589 | Enhanced predicate registers having predicates corresponding to element widths | — | 2016-05-24 |
| 9342304 | Processing vectors using wrapping increment and decrement instructions in the macroscalar architecture | — | 2016-05-17 |
| 9335997 | Processing vectors using a wrapping rotate previous instruction in the macroscalar architecture | — | 2016-05-10 |
| 9335980 | Processing vectors using wrapping propagate instructions in the macroscalar architecture | — | 2016-05-10 |
| 9317284 | Vector hazard check instruction with reduced source operands | Alexander Klaiber | 2016-04-19 |
| 9317283 | Running shift for divide instructions for processing vectors | — | 2016-04-19 |
| 9311094 | Predicting a pattern in addresses for a memory-accessing instruction when processing vector instructions | — | 2016-04-12 |
| 9298456 | Mechanism for performing speculative predicated instructions | — | 2016-03-29 |
| 9268569 | Branch misprediction behavior suppression on zero predicate branch mispredict | — | 2016-02-23 |
| 9257101 | Method for reducing graphics rendering failures | Ian C. Hendry, Jeremy Sandmel | 2016-02-09 |
| 9201608 | Memory controller mapping on-the-fly | Ian C. Hendry, Rajabali M. Koduri | 2015-12-01 |