Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9672305 | Method for gating clock signals using late arriving enable signals | Suparn Vats, Rohit Kumar | 2017-06-06 |
| 6799308 | Timing analysis of latch-controlled digital circuits with detailed clock skew analysis | Eileen H. You, Matthew Becker, Thomas Dillinger, Micah C. Knapp, Peter R. O'Brien +1 more | 2004-09-28 |