Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12379899 | Performing multiple bit computation and convolution in memory | Shahzad Nazar, Bharan Giridhar, Mohamed H. Abu-Rahma, Ajay Bhatia, Mayur Joshi +1 more | 2025-08-05 |
| 11914973 | Performing multiple bit computation and convolution in memory | Shahzad Nazar, Bharan Giridhar, Mohamed H. Abu-Rahma, Ajay Bhatia, Mayur Joshi +1 more | 2024-02-27 |
| 9361959 | Low power double pumped multi-port register file architecture | Ajay Bhatia | 2016-06-07 |
| 9001593 | Apparatus to suppress concurrent read and write word line access of the same memory element in a memory array | Hitesh Gupta, Greg M. Hess | 2015-04-07 |