Issued Patents All Time
Showing 176–185 of 185 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5687110 | Array having an update circuit for updating a storage location with a value stored in another storage location | Andrew McBride | 1997-11-11 |
| 5619464 | High performance RAM array circuit employing self-time clock generator for enabling array accessess | — | 1997-04-08 |
| 5586295 | Combination prefetch buffer and instruction cache | — | 1996-12-17 |
| 5502414 | Circuit for delaying data latching from a precharged bus and method | Gopi Ganapathy, Michael D. Goddard, Robert C. Thaden | 1996-03-26 |
| 5483645 | Cache access system for multiple requestors providing independent access to the cache arrays | — | 1996-01-09 |
| 5345569 | Apparatus and method for resolving dependencies among a plurality of instructions within a storage device | — | 1994-09-06 |
| 5301330 | Contention handling apparatus for generating user busy signal by logically summing wait output of next higher priority user and access requests of higher priority users | — | 1994-04-05 |
| 5251306 | Apparatus for controlling execution of a program in a computing device | — | 1993-10-05 |
| 5185868 | Apparatus having hierarchically arranged decoders concurrently decoding instructions and shifting instructions not ready for execution to vacant decoders higher in the hierarchy | — | 1993-02-09 |
| 4940908 | Method and apparatus for reducing critical speed path delays | — | 1990-07-10 |