Radu Barsan — 17 Patents at AMD

Radu Barsan has been granted 17 US patents while listed as an inventor at AMD. The first was granted in 1996 and the most recent in January 2013. Radu Barsan ranks #263,971 of 4,157,543 US inventors in our database (top 6.3%). Patent records list Radu Barsan in Cupertino, CA, US.

Issued Patents All Time

Showing 1–17 of 17 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
8358889	Device fabrication with planar bragg gratings suppressing parasitic effects	Lew Stolpner	2013-01-22
6211022	Field leakage by using a thin layer of nitride deposited by chemical vapor deposition	Jonathan Lin, Sunil Mehta	2001-04-03	$5,058,000
6071784	Annealing of silicon oxynitride and silicon nitride films to eliminate high temperature charge loss	Sunil Mehta	2000-06-06	$15,623,000
6064105	Data retention of EEPROM cell with shallow trench isolation using thicker liner oxide	Xiao-Yu Li, Sunil Mehta	2000-05-16
5959336	Decoder circuit with short channel depletion transistors	—	1999-09-28	$1,779,000
5942780	Integrated circuit having, and process providing, different oxide layer thicknesses on a substrate	Xiao-Yu Li, Sunil Mehta	1999-08-24	$2,354,000
5908308	Use of borophosphorous tetraethyl orthosilicate (BPTEOS) to improve isolation in a transistor array	Jonathan Lin, Sunil Mehta	1999-06-01	$4,882,000
5854114	Data retention of EEPROM cell with shallow trench isolation using thicker liner oxide	Xiao-Yu Li, Sunil Mehta	1998-12-29	$6,209,000
5841701	Method of charging and discharging floating gage transistors to reduce leakage current	Xiao-Yu Li, Sunil Mehta	1998-11-24	$5,156,000
5830795	Simplified masking process for programmable logic device manufacture	Sunil Mehta	1998-11-03	$3,785,000
5761116	V.sub.pp only scalable EEPROM memory cell having transistors with thin tunnel gate oxide	Xiao-Yu Li	1998-06-02	$1,907,000
5700698	Method for screening non-volatile memory and programmable logic devices	Jonathan Lin	1997-12-23	$37,864,000
5672521	Method of forming multiple gate oxide thicknesses on a wafer substrate	Xiao-Yu Li, Sunil Mehta	1997-09-30	$7,869,000
5646901	CMOS memory cell with tunneling during program and erase through the NMOS and PMOS transistors and a pass gate separating the NMOS and PMOS transistors	Bradley A. Sharpe-Geisler, Jonathan Lin	1997-07-08	$8,107,000
5615150	Control gate-addressed CMOS non-volatile cell that programs through gates of CMOS transistors	Jonathan Lin	1997-03-25	$12,071,000
5594687	Completely complementary MOS memory cell with tunneling through the NMOS and PMOS transistors during program and erase	Jonathan Lin, Bradley A. Sharpe-Geisler	1997-01-14	$18,167,000
5587945	CMOS EEPROM cell with tunneling window in the read path	Jonathan Lin, Jack Peng, Sunil Mehta	1996-12-24	$13,932,000

Radu Barsan — 17 Patents

Issued Patents All Time

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