MS

Markus Seuring

AM AMD: 4 patents #2,565 of 9,279Top 30%
AD Advantest: 2 patents #465 of 1,193Top 40%
Globalfoundries: 1 patents #2,221 of 4,424Top 55%
Overall (All Time): #726,648 of 4,157,543Top 20%
7
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
9885752 Test apparatus for generating reference scan chain test data and test system Michael Braun 2018-02-06
9164726 Apparatus for determining a number of successive equal bits preceding an edge within a bit stream and apparatus for reconstructing a repetitive bit sequence Jochen Rivoir 2015-10-20
8307249 At-speed bitmapping in a memory built-in self-test by locking an N-TH failure Kay Hesse, Kai Eichhorn 2012-11-06
7689884 Multicore chip test 2010-03-30
7673208 Storing multicore chip test data 2010-03-02
7653845 Test algorithm selection in memory built-in self test controller Siegfried Kay Hesse, Thomas Herrmann 2010-01-26
7340658 Technique for combining scan test and memory built-in self test 2008-03-04