Joseph Skrovan — 9 Patents at AMD

Joseph Skrovan has been granted 9 US patents while listed as an inventor at AMD. The first was granted in 1999 and the most recent in August 2004. Joseph Skrovan ranks #535,341 of 4,157,543 US inventors in our database (top 12.9%). Patent records list Joseph Skrovan in Kyle, TX, US.

Issued Patents All Time

Showing 1–9 of 9 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
6785856	Internal self-test circuit for a memory array	Allan Parker	2004-08-31	$2,273,000
6707713	Interlaced multi-level memory	Allan Parker, Brett Gerhardt	2004-03-16	$3,543,000
6684353	Reliability monitor for a memory array	Allan Parker	2004-01-27	$5,673,000
6424569	User selectable cell programming	Allan Parker	2002-07-23	$1,368,000
6400624	Configure registers and loads to tailor a multi-level cell flash design	Allan Parker	2002-06-04	$2,015,000
6112312	Method for generating functional tests for a microprocessor having several operating modes and features	Allan Parker	2000-08-29	$7,735,000
6091631	Program/verify technique for multi-level flash cells enabling different threshold levels to be simultaneously programmed	Joe Kucera	2000-07-18	$10,732,000
6016554	Method for event-related functional testing of a microprocessor	Allan Parker	2000-01-18	$6,465,000
5960457	Cache coherency test system and methodology for testing cache operation in the presence of an external snoop	Royce K. Presley, Hamilton B. Carter	1999-09-28	$1,779,000

Joseph Skrovan — 9 Patents

Issued Patents All Time

Patent Widget