Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6745375 | System and method for reducing computational overhead in a sequenced functional verification system | — | 2004-06-01 |
| 6738737 | Race condition ordering and functional verification system and method | — | 2004-05-18 |
| 6173243 | Memory incoherent verification methodology | Mike Lowe, Mark Gerald LaVine, Jelena Ilic, Paul W. Berndt, Tahsin Askar +1 more | 2001-01-09 |
| 6154801 | Verification strategy using external behavior modeling | Mike Lowe, Mark Gerald LaVine, Jelena Ilic, Paul W. Berndt, Tahsin Askar +1 more | 2000-11-28 |
| 5996050 | Cache coherency detection in a bus bridge verification system | William M. Lowe | 1999-11-30 |
| 5996034 | Bus bridge verification system including device independent bus monitors | — | 1999-11-30 |
| 5963722 | Byte granularity data checking in a bus bridge verification system | — | 1999-10-05 |
| 5961625 | Bus bridge state monitoring in a bus bridge verification system | — | 1999-10-05 |
| 5958035 | State machine based bus cycle completion checking in a bus bridge verification system | William M. Lowe | 1999-09-28 |
| 5960457 | Cache coherency test system and methodology for testing cache operation in the presence of an external snoop | Joseph Skrovan, Royce K. Presley | 1999-09-28 |
| 5941971 | Bus bridge transaction checker for correct resolution of combined data cycles | — | 1999-08-24 |
| 5938777 | Cycle list based bus cycle resolution checking in a bus bridge verification system | — | 1999-08-17 |
| 5930482 | Transaction checking system for verifying bus bridges in multi-master bus systems | William M. Lowe | 1999-07-27 |
| 5913043 | State machine based bus bridge performance and resource usage monitoring in a bus bridge verification system | William M. Lowe | 1999-06-15 |