| 7010774 |
Bottom-up approach for synthesis of register transfer level (RTL) based design |
Beng Chew Khou, Boon Piaw Tan |
2006-03-07 |
| 6675335 |
Method and apparatus for exercising external memory with a memory built-in self-test |
Sie Boo Chiang, Beng Chew Khou |
2004-01-06 |
| 6530052 |
Method and apparatus for looping back a current state to resume a memory built-in self-test |
Beng Chew Khou, Boon Piaw Tan |
2003-03-04 |
| 6493647 |
Method and apparatus for exercising external memory with a memory built-in self-test |
Sie Boo Chiang, Beng Chew Khou |
2002-12-10 |
| 6408423 |
Method for faster verification of a design for an integrated circuit |
Beng Chew Khou, Joon-Kit Goh |
2002-06-18 |
| 6255845 |
Efficient use of spare gates for post-silicon debug and enhancements |
David Chiang, Jaime Tolentino |
2001-07-03 |
| 6253275 |
Interrupt gating method for PCI bridges |
Scott Waldron |
2001-06-26 |
| 6240480 |
Bus bridge that provides selection of optimum timing speed for transactions |
Scott Waldron, Mark Knecht |
2001-05-29 |
| 6163502 |
Clocking to support interface of memory controller to external SRAM |
Beng Chew Khou, Leok Saw Chua |
2000-12-19 |
| 5793672 |
Low power register memory element circuits |
Reuben A. Aspacio, Beng Chew Khou |
1998-08-11 |