Issued Patents All Time
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11093308 | System and method for sending messages to configure remote virtual endpoints in nodes of a systolic array | Ashwin Kamath, Michael Enz | 2021-08-17 |
| 10713046 | System memory controller with atomic operations | Michael Enz, Ashwin Kamath | 2020-07-14 |
| 10503477 | Galois field pipelined multiplier with polynomial and beta input passing scheme | Ashwin Kamath | 2019-12-10 |
| 10437740 | High performance raid operations offload with minimized local buffering | Ashwin Kamath, Michael Enz | 2019-10-08 |
| 10389658 | Auto zero copy applied to a compute element within a systolic array | Ashwin Kamath, Todd Blackmon, Michael Enz | 2019-08-20 |
| 7913261 | Application-specific information-processing method, system, and apparatus | Oscar Mitchell, Robert B. Cohen, Eleanor Coy, Rajat Datta, Randall Findley +4 more | 2011-03-22 |
| 7328270 | Communication protocol processor having multiple microprocessor cores connected in series and dynamically reprogrammed during operation via instructions transmitted along the same data paths used to convey communication data | Donald G. Craycraft, Carl K. Wakeland | 2008-02-05 |
| 7088680 | System and method for digital communication via a time division multiplexed serial data stream | William W. Freitag, Jr. | 2006-08-08 |
| 6978412 | Method and apparatus for adaptive frame tracking | Patrick Maupin | 2005-12-20 |
| 6266715 | Universal serial bus controller with a direct memory access mode | Bruce A. Loyer, Allen Thor | 2001-07-24 |
| 6067627 | Core section having asynchronous partial reset | — | 2000-05-23 |
| 5898232 | Input/output section of an integrated circuit having separate power down capability | Mark T. Ellis | 1999-04-27 |
| 5860125 | Integrated circuit including a real time clock, configuration RAM, and memory controller in a core section which receives an asynchronous partial reset and an asynchronous master reset | — | 1999-01-12 |
| 5561384 | Input/output driver circuit for isolating with minimal power consumption a peripheral component from a core section | Michael S. Quimby, Carl K. Wakeland | 1996-10-01 |
| 5534889 | Circuit for controlling bias voltage used to regulate contrast in a display panel | Patrick R. Cooper, James H. Garrett, Philip McKenzie | 1996-07-09 |
| 5455907 | Buffering digitizer data in a first-in first-out memory | Randall L. Hess, Gaines C. Teague, Patrick R. Cooper, Hung Q. Le | 1995-10-03 |