OM

Oscar Mitchell

NL Ncipher Corporation Limited: 4 patents #1 of 20Top 5%
IBM: 4 patents #21,733 of 70,183Top 35%
GE: 3 patents #10,354 of 36,430Top 30%
AD Adaptec: 1 patents #154 of 322Top 50%
MD Morpho Detection: 1 patents #53 of 132Top 45%
Overall (All Time): #386,304 of 4,157,543Top 10%
13
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
7913261 Application-specific information-processing method, system, and apparatus Robert B. Cohen, Eleanor Coy, Rajat Datta, Randall Findley, James Garrett +4 more 2011-03-22
7900042 Encrypted packet inspection Rick Hall 2011-03-01
7853014 Ring arithmetic method, system, and apparatus George Robert Blakley, III, Rajat Datta, Kyle Stein 2010-12-14
7671586 Apparatus and method for non-symmetric magnetic field balancing in an inspection scanner Christopher W. Crowley, Michael Avner Urbach, Kevin A. Derby, Adam J. Drew 2010-03-02
7511514 Passenger screening system and method Christopher W. Crowley, Richard Shelby, Richard Keith Ostrom 2009-03-31
7397239 Passenger screening system and method Christopher W. Crowley, Todor K. Petrov 2008-07-08
7327137 Apparatus and method for non-symmetric magnetic field balancing in an inspection scanner Christopher W. Crowley, Michael Avner Urbach, Kevin A. Derby, Adam J. Drew 2008-02-05
7218734 Ring arithmetic method, system, and apparatus George Blakely, Rajat Datta, Kyle Stein 2007-05-15
5999992 System and method for controlling the direction of data flow between computing elements Gregory F. Grohoski, William R. Hardell, Jr., Paul J. Jordan, Tung Nguyen, Yonjae Rim 1999-12-07
5815678 Method and apparatus for implementing an application programming interface for a communications bus Gary A. Hoffman, Eric Shalkey, Daniel Joseph Moore, Rajat Datta 1998-09-29
5555543 Crossbar switch apparatus and protocol Gregory F. Grohoski, Tung Nguyen, Yongjae Rim 1996-09-10
5448716 Apparatus and method for booting a multiple processor system having a global/local memory architecture William R. Hardell, Jr., James D. Henson, Jr. 1995-09-05
5327548 Apparatus and method for steering spare bit in a multiple processor system having a global/local memory architecture William R. Hardell, Jr., James D. Henson, Jr. 1994-07-05