Issued Patents All Time
Showing 26–50 of 152 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7003676 | Locking mechanism override and disable for personal computer ROM access protection | Frederick Daniel Weber | 2006-02-21 |
| 7003607 | Managing a controller embedded in a bridge | — | 2006-02-21 |
| 6998870 | Method and apparatus for impedance matching in systems configured for multiple processors | Jonathan P. Dowling | 2006-02-14 |
| 6990550 | Transaction duration management in a USB host controller | Siegfried Kay Hesse | 2006-01-24 |
| 6968460 | Cryptographic randomness register for computer system security | — | 2005-11-22 |
| 6963948 | Microcomputer bridge architecture with an embedded microcontroller | — | 2005-11-08 |
| 6952751 | Method and apparatus for extending legacy computer systems | — | 2005-10-04 |
| 6944725 | Reciprocally adjustable dual queue mechanism | Siegfried Kay Hesse | 2005-09-13 |
| 6892332 | Hardware interlock mechanism using a watchdog timer | — | 2005-05-10 |
| 6889262 | Direct transaction mode for peripheral devices | — | 2005-05-03 |
| 6862641 | Interruptable and re-enterable system management mode programming code | Geoffrey S. Strongin | 2005-03-01 |
| 6857033 | I/O node for a computer system including an integrated graphics engine and an integrated I/O hub | Larry D. Hewitt, James O. Mergard | 2005-02-15 |
| 6836813 | Switching I/O node for connection in a multiprocessor computer system | — | 2004-12-28 |
| 6832317 | Personal computer security mechanism | Geoffrey S. Strongin | 2004-12-14 |
| 6823403 | DMA mechanism for high-speed packet bus | Siegfried Kay Hesse | 2004-11-23 |
| 6823451 | Integrated circuit for security and manageability | Geoffrey S. Strongin | 2004-11-23 |
| 6816935 | Interrupt and status reporting structure and method for a timeslot bus | — | 2004-11-09 |
| 6798418 | Graphics subsystem including a RAMDAC IC with digital video storage interface for connection to a graphics bus | Gabriele Sartori | 2004-09-28 |
| 6791554 | I/O node for a computer system including an integrated graphics engine | James O. Mergard, Larry D. Hewitt | 2004-09-14 |
| 6766347 | System and method for providing a remote user with a virtual presence to an office | — | 2004-07-20 |
| 6760852 | System and method for monitoring and controlling a power-manageable resource based upon activities of a plurality of devices | — | 2004-07-06 |
| 6704763 | Hardware enforcement mechanism for an isochronous task scheduler | — | 2004-03-09 |
| 6697890 | I/O node for a computer system including an integrated I/O interface | Larry D. Hewitt | 2004-02-24 |
| 6690676 | Non-addressed packet structure connecting dedicated end points on a multi-pipe computer interconnect bus | — | 2004-02-10 |
| 6671748 | Method and apparatus for passing device configuration information to a shared controller | Terry L. Cole, Timothy C. Maleck, Frank Barth, Joerg Winkler | 2003-12-30 |