Issued Patents All Time
Showing 26–50 of 63 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10838727 | Device and method for cache utilization aware data compression | Shomit N. Das, Kishore Punniyamurthy, Matthew Tomei | 2020-11-17 |
| 10620994 | Continuation analysis tasks for GPU task scheduling | Steven Tony Tye, Brian L. Sumner, Sooraj Puthoor | 2020-04-14 |
| 10558418 | Monitor support on accelerated processing device | Alexandru Dutu | 2020-02-11 |
| 10522193 | Processor with host and slave operating modes stacked with memory | Nuwan Jayasena, Gabriel H. Loh, James M. O'Connor, Lisa R. Hsu | 2019-12-31 |
| 10409610 | Method and apparatus for inter-lane thread migration | Sooraj Puthoor | 2019-09-10 |
| 10360652 | Wavefront resource virtualization | Marc S. Orr, Benedict R. Gaster, Steven K. Reinhardt, David A. Wood | 2019-07-23 |
| 10320695 | Message aggregation, combining and compression for efficient data communications in GPU-based clusters | Steven K. Reinhardt, Marc S. Orr, Shuai Che, David A. Wood | 2019-06-11 |
| 10209990 | Conditional atomic operations in single instruction multiple data processors | David A. Wood, Steven K. Reinhardt, Marc S. Orr | 2019-02-19 |
| 10198261 | Flexible framework to support memory synchronization operations | Shuai Che, Marc S. Orr | 2019-02-05 |
| 10079044 | Processor with host and slave operating modes stacked with memory | Nuwan Jayasena, Gabriel H. Loh, James M. O'Connor, Lisa R. Hsu | 2018-09-18 |
| 10019377 | Managing cache coherence using information in a page table | Arkaprava Basu, Shuai Che, Sooraj Puthoor | 2018-07-10 |
| 9898287 | Dynamic wavefront creation for processing units using a hybrid compactor | Sooraj Puthoor, Dmitri Yudanov | 2018-02-20 |
| 9804883 | Remote scoped synchronization for work stealing and sharing | Marc S. Orr, Ayse Yilmazer, Shuai Che, David A. Wood, Mark D. Hill | 2017-10-31 |
| 9766936 | Selecting a resource from a set of resources for performing an operation | Mithuna S. Thottethodi, James M. O'Connor, Mauricio Breternitz, Lisa R. Hsu, Gabriel H. Loh +1 more | 2017-09-19 |
| 9697147 | Stacked memory device with metadata management | Gabriel H. Loh, James M. O'Connor, Michael Ignatowski | 2017-07-04 |
| 9678806 | Method and apparatus for distributing processing core workloads among processing cores | Shuai Che, Marc S. Orr, Ayse Yilmazer | 2017-06-13 |
| 9652390 | Moving data between caches in a heterogeneous processor system | Junli Gu, Yuan Xie | 2017-05-16 |
| 9477599 | Write combining cache microarchitecture for synchronization events | Blake Alan Hechtman | 2016-10-25 |
| 9411663 | Conditional notification mechanism | Steven K. Reinhardt, Marc S. Orr | 2016-08-09 |
| 9396112 | Hierarchical write-combining cache coherence | Blake Alan Hechtman | 2016-07-19 |
| 9361118 | Method for memory consistency among heterogeneous computer components | Derek Robert Hower, Mark D. Hill, David A. Wood, Steven K. Reinhardt, Benedict R. Gaster +1 more | 2016-06-07 |
| 9354892 | Creating SIMD efficient code by transferring register state through common memory | Timothy G. Rogers, James M. O'Connor | 2016-05-31 |
| 9342334 | Simulating vector execution | Nilay Vaish, Steven K. Reinhardt | 2016-05-17 |
| 9317296 | High level software execution mask override | Timothy G. Rogers, James M. O'Connor | 2016-04-19 |
| 9256535 | Conditional notification mechanism | Steven K. Reinhardt, Marc S. Orr | 2016-02-09 |