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Testing for shorts between internal nodes of a power distribution grid |
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Column redundancy scheme for non-volatile flash memory using JTAG input protocol |
Ping-Chen Liu |
2006-08-08 |
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High voltage regulation circuit to minimize voltage overshoot |
Ping-Chen Liu |
2005-03-01 |
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Column redundancy scheme for serially programmable integrated circuits |
Ping-Chen Liu |
2004-11-09 |
| 6262920 |
Program latch with charge sharing immunity |
Benjamin Louie |
2001-07-17 |
| 5991194 |
Method and apparatus for providing accessible device information in digital memory devices |
Robin John Jigour |
1999-11-23 |
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Non-volatile programmable memory having a buffering capability and method of operation thereof |
Michel E. Gannage, David K. Wong |
1999-01-19 |
| 5724303 |
Non-volatile programmable memory having an SRAM capability |
Michael E. Gannage, David K. Wong |
1998-03-03 |
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Memory circuit with pumped voltage for erase and program operations |
Christophe J. Chevallier, Darrell Rinerson, Steve Kuo-Ren Hsia |
1994-05-17 |
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Charge pump with high output current |
Christophe J. Chevallier |
1993-06-01 |
