Patents per Year
Issued Patents All Time
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date | Approx Value ⓘ |
|---|---|---|---|---|
| 10013715 | Temporary waiver tool | Raghavendran Narasimhan, Gurdeep Singh Walia, Saroj Kumar Bonthapalli | 2018-07-03 | $129,397,000 |
| 8356270 | Interconnect and transistor reliability analysis for deep sub-micron designs | Tom Burd, Yuri Apanovich, Srinivasaraghavan Krishnamoorthy, Vishak Venkatraman | 2013-01-15 | $3,701,000 |
| 7425858 | Delay line periodically operable in a closed loop | — | 2008-09-16 | $12,594,000 |
| 7271634 | Delay-locked loop having a plurality of lock modes | Sanjay Sethi, Philip E. Madrid | 2007-09-18 | $10,707,000 |
| 7256636 | Voltage controlled delay line (VCDL) having embedded multiplexer and interpolation functions | Rohit Kumar, Sanjay Sethi | 2007-08-14 | $3,919,000 |