| 7106081 |
Parallel calibration system for a test device |
Romi Mayder, Todd Sholl, Nasser Jafari, Andrew C. S. Tse |
2006-09-12 |
| 6834364 |
Algorithmically programmable memory tester with breakpoint trigger, error jamming and 'scope mode that memorizes target sequences |
Alan S. Krech, Jr., Brad D. Reak, John M Freeseman |
2004-12-21 |
| 6671844 |
Memory tester tests multiple DUT's per test site |
Alan S. Krech, Jr., John M Freeseman, Edmundo De La Puente |
2003-12-30 |
| 6570397 |
Timing calibration and timing calibration verification of electronic circuit testers |
Romi Mayder, Noriyuki Sugihara, Andrew C. S. Tse |
2003-05-27 |
| 6373312 |
Precision, high speed delay system for providing delayed clock edges with new delay values every clock period |
Robert Keith Barnes |
2002-04-16 |
| 5995121 |
Multiple graphics pipeline integration with a windowing system through the use of a high speed interconnect to the frame buffer |
Byron A. Alcorn, Howard D. Stroyan |
1999-11-30 |
| 5437007 |
Control sequencer in an iconic programming system |
Douglas C. Beethe, James P. Armentrout |
1995-07-25 |