Issued Patents All Time
Showing 1–25 of 25 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12399772 | Devices, systems, and methods for detecting and mitigating silent data corruptions via adaptive voltage-frequency scaling | Divya Madapusi Srinivas Prasad, Sudhanva Gurumurthi, Yasuko Eckert, Sankaranarayanan Gurumurthy, Amitabh Mehra +4 more | 2025-08-26 |
| 11966283 | Devices, systems, and methods for detecting and mitigating silent data corruptions via adaptive voltage-frequency scaling | Divya Madapusi Srinivas Prasad, Sudhanva Gurumurthi, Yasuko Eckert, Sankaranarayanan Gurumurthy, Amitabh Mehra +4 more | 2024-04-23 |
| 7640468 | Method and apparatus for an embedded time domain reflectometry test | David Linam, Guy Humphrey | 2009-12-29 |
| 7580806 | Apparatus and method for compensating clock period elongation during scan testing in an integrated circuit (IC) | Richard S. Rodgers, Cory Groth | 2009-08-25 |
| 7519875 | Method and apparatus for enabling a user to determine whether a defective location in a memory device has been remapped to a redundant memory portion | Louise A. Koss, Mary Louise Nash, Dale Beucler | 2009-04-14 |
| 7516379 | Circuit and method for comparing circuit performance between functional and AC scan testing in an integrated circuit (IC) | John G. Rohrbaugh | 2009-04-07 |
| 7502978 | Systems and methods for reconfiguring scan chains | John Bratt | 2009-03-10 |
| 7411407 | Testing target resistances in circuit assemblies | Jacob L. Bell | 2008-08-12 |
| 7352165 | Delay-locked loop and a method of testing a delay-locked loop | Alvin Leng Sun Loke, Michael Joseph Gilsdorf, Peter Jacob Meier | 2008-04-01 |
| 7222278 | Programmable hysteresis for boundary-scan testing | Charles Moore, Xiaoyang Zhang | 2007-05-22 |
| 7143324 | System and method for automatic masking of compressed scan chains with unbalanced lengths | John Bratt | 2006-11-28 |
| 7139948 | Method for determining the impact on test coverage of scan chain parallelization by analysis of a test set for independently accessible flip-flops | Manish Sharma | 2006-11-21 |
| 7123001 | Delay-locked loop and a method of testing a delay-locked loop | Alvin Leng Sun Loke, Michael Joseph Gilsdorf, Peter Jacob Meier | 2006-10-17 |
| 7079973 | Apparatus and method for compensating clock period elongation during scan testing in an integrated circuit (IC) | Richard S. Rodgers, Cory Groth | 2006-07-18 |
| 7043674 | Systems and methods for facilitating testing of pads of integrated circuits | John G. Rohrbaugh, Shad Shepston | 2006-05-09 |
| 6995554 | Delay-locked loop and a method of testing a delay-locked loop | Alvin Leng Sun Loke, Michael Joseph Gilsdorf, Peter Jacob Meier | 2006-02-07 |
| 6986085 | Systems and methods for facilitating testing of pad drivers of integrated circuits | John G. Rohrbaugh, Shad Shepston | 2006-01-10 |
| 6907376 | Systems and methods for facilitating testing of pad receivers of integrated circuits | Shad Shepston, John G. Rohrbaugh | 2005-06-14 |
| 6859059 | Systems and methods for testing receiver terminations in integrated circuits | John G. Rohrbaugh | 2005-02-22 |
| 6762614 | Systems and methods for facilitating driver strength testing of integrated circuits | John G. Rohrbaugh, Shad Shepston | 2004-07-13 |
| 6741946 | Systems and methods for facilitating automated test equipment functionality within integrated circuits | John G. Rohrbaugh, Shad Shepston | 2004-05-25 |
| 6658613 | Systems and methods for facilitating testing of pad receivers of integrated circuits | John G. Rohrbaugh, Shad Shepston | 2003-12-02 |
| 6577980 | Systems and methods for facilitating testing of pad receivers of integrated circuits | Shad Shepston, John G. Rohrbaugh | 2003-06-10 |
| 6556938 | Systems and methods for facilitating automated test equipment functionality within integrated circuits | John G. Rohrbaugh, Shad Shepston | 2003-04-29 |
| 6067651 | Test pattern generator having improved test sequence compaction | John G. Rohrbaugh | 2000-05-23 |