WW

William B. Wilson

AS Agere Systems: 12 patents #76 of 1,849Top 5%
AT AT&T: 8 patents #2,286 of 18,772Top 15%
UN US Navy: 1 patents #406 of 884Top 50%
CI Cisco: 1 patents #7,901 of 13,007Top 65%
Overall (All Time): #181,207 of 4,157,543Top 5%
23
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12110376 Soft matter having an Anderson transition to a localized phase Bernard R. Matis, Nicholas T. Gangemi, Jeffrey W. Baldwin, Steven W. Liskey, Aaron D. Edmunds +1 more 2024-10-08
9007106 Jitter suppression in type I delay-locked loops 2015-04-14
8407511 Method and apparatus for generating early or late sampling clocks for CDR data recovery Mohammad S. Mobin, Kenneth W. Paist, Lane A. Smith, Paul H. Tracy 2013-03-26
8143696 Integrated circuit inductors with reduced magnetic coupling Weiwei Mao, Shahriar Moinian, Kenneth W. Paist 2012-03-27
7844021 Method and apparatus for clock skew calibration in a clock and data recovery system using multiphase sampling Tom Gibbons, Kenneth W. Paist, Mark Trafford 2010-11-30
7839965 High-speed serial data link with single precision clock source Kenneth W. Paist 2010-11-23
7787515 Method and apparatus for generation of asynchronous clock for spread spectrum transmission Mohammad S. Mobin, Gregory W. Sheets, Vladimir Sindalovsky, Craig B. Ziemer 2010-08-31
7710170 Internal supply voltage controlled PLL and methods for using such Roger A. Fratti, Kenneth W. Paist 2010-05-04
7679405 Latch-based sense amplifier 2010-03-16
7268631 Phase locked loop with scaled damping capacitor 2007-09-11
7106107 Reliability comparator with hysteresis Dipankar Bhattacharya, John C. Kriz, Bernard L. Morris 2006-09-12
7049866 Compensating for leakage currents in loop filter capacitors in PLLs and the like 2006-05-23
6876054 Integrable DC/AC voltage transformer/isolator and ultra-large-scale circuit incorporating the same Shye Shapira, Gerard Zaneski 2005-04-05
6668334 Apparatus for detecting clock failure within a fixed number of cycles of the clock Christopher J. Abel, Angelo R. Mastrocola, Douglas Edward Sherry 2003-12-23
6594330 Phase-locked loop with digitally controlled, frequency-multiplying oscillator 2003-07-15
6114920 Self-calibrating voltage-controlled oscillator for asynchronous phase applications Un-Ku Moon 2000-09-05
6043715 Phase-locked loop with static phase offset compensation James A. Bailey, Angelo R. Mastrocola, Jeffrey L. Sonntag 2000-03-28
6040742 Charge-pump phase-locked loop with DC current source James A. Bailey 2000-03-21
6037621 On-chip capacitor structure 2000-03-14
5942949 Self-calibrating phase-lock loop with auto-trim operations for selecting an appropriate oscillator operating curve Un-Ku Moon 1999-08-24
5717720 Digital data receivers, methods and circuitry for differentiating between transmitted signals of varying physical protocols and frequencies Lisa Piper Jackson 1998-02-10
5199049 Circuit and method of digital carrier detection for burst mode communication systems 1993-03-30
4818929 Fully differential analog comparator Jeffrey L. Sonntag, Thayamkulangara R. Viswanathan 1989-04-04