CZ

Craig B. Ziemer

AS Agere Systems: 14 patents #61 of 1,849Top 4%
AT AT&T: 5 patents #3,608 of 18,772Top 20%
AG Agere Systems Guardian: 1 patents #274 of 810Top 35%
Overall (All Time): #224,507 of 4,157,543Top 6%
20
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
8798222 Methods and apparatus for digital linearization of an analog phase interpolator Mohammad S. Mobin, Gregory W. Sheets, Lane A. Smith 2014-08-05
8385493 Method and apparatus for improving linearity in clock and data recovery systems Christopher J. Abel, Joseph Anidjar, Vladimir Sindalovsky 2013-02-26
8126039 Methods and apparatus for evaluating the eye margin of a communications device using a data eye monitor Mohammad S. Mobin, Gregory W. Sheets, Lane A. Smith 2012-02-28
7928789 Methods and apparatus for improved phase switching and linearity in an analog phase interpolator Ronald L. Freyman 2011-04-19
7787515 Method and apparatus for generation of asynchronous clock for spread spectrum transmission Mohammad S. Mobin, Gregory W. Sheets, Vladimir Sindalovsky, William B. Wilson 2010-08-31
7778377 Methods and apparatus for spread spectrum generation using a voltage controlled delay loop Vladimir Sindalovsky, Lane A. Smith 2010-08-17
7724857 Method and apparatus for improving linearity in clock and data recovery systems Christopher J. Abel, Joseph Anidjar, Vladimir Sindalovsky 2010-05-25
7560967 Methods and apparatus for improved phase switching and linearity in an analog phase interpolator Ronald L. Freyman 2009-07-14
7425856 Phase interpolator with output amplitude correction Christopher J. Abel, Joseph Anidjar, Vladimir Sindalovsky 2008-09-16
7312667 Statically controlled clock source generator for VCDL clock phase trimming Mohammad S. Mobin, Gregory W. Sheets, Vladimir Sindalovsky, Lane A. Smith 2007-12-25
7298195 Methods and apparatus for improved phase switching and linearity in an analog phase interpolator Ronald L. Freyman 2007-11-20
7236037 Alternating clock signal generation for delay loops Christopher J. Abel, Vladimir Sindalovsky 2007-06-26
7205811 Methods and apparatus for maintaining desired slope of clock edges in a phase interpolator using an adjustable bias Ronald L. Freyman 2007-04-17
7190198 Voltage controlled delay loop with central interpolator Ronald L. Freyman, Vladimir Sindalovsky, Lane A. Smith 2007-03-13
6381086 Programmable active damping for high-speed write driver Reed H. Koenig 2002-04-30
5969745 Gray shade driver for pixel array 1999-10-19
5675640 Telephone ringing signal detector Eric William Tappert 1997-10-07
5532498 High sensitivity control circuit for optical solid-state relays Dean M. Umberger 1996-07-02
5221847 Break-before-make control for form C solid-state relays with current limiter bypass 1993-06-22
5138177 Solid-state relay Mark C. Morgan 1992-08-11