JT

Jesse Thilo

AS Agere Systems: 5 patents #269 of 1,849Top 15%
AT AT&T: 2 patents #7,280 of 18,772Top 40%
AG Agere Systems Guardian: 1 patents #274 of 810Top 35%
Overall (All Time): #656,411 of 4,157,543Top 20%
8
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
7769948 Virtual profiles for storage-device array encoding/decoding Richard J. Byrne, Eu Gene Goh, Silvester Tjandra 2010-08-03
7644303 Back-annotation in storage-device array Richard J. Byrne, Eu Gene Goh, Nevin C. Heintze, Nigamanth Lakshminarayana, Silvester Tjandra 2010-01-05
7360148 Reduction checksum generator and a method of calculation thereof Paul D'Arcy, Kent E. Wires 2008-04-15
7206994 Checksum calculator with tree structure of reduction stages Paul D'Arcy, Kerry Snyder, Kent E. Wires, Vitaly A. Zelov 2007-04-17
6859871 Method and apparatus for reducing power consumption in a pipelined processor Dean Batten, Paul D'Arcy, C. John Glossner, Sanjay Jinturkar, Kent E. Wires 2005-02-22
6317821 Virtual single-cycle execution in pipelined processors Dean Batten, Paul D'Arcy, C. John Glossner, Sanjay Jinturkar 2001-11-13
6260189 Compiler-controlled dynamic instruction dispatch in pipelined processors Dean Batten, Paul D'Arcy, C. John Glossner, Sanjay Jinturkar, Stamatis Vassiliadis +1 more 2001-07-10
6256725 Shared datapath processor utilizing stack-based and register-based storage spaces Dean Batten, Paul D'Arcy, C. John Glossner, Sanjay Jinturkar, Kent E. Wires 2001-07-03