SC

Shih-Li Chen

AT Advanced Chip Engineering Technology: 4 patents #6 of 28Top 25%
CT Caesar Technology: 4 patents #1 of 3Top 35%
UN Unknown: 3 patents #7,366 of 83,584Top 9%
Overall (All Time): #424,054 of 4,157,543Top 15%
12
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
7985626 Manufacturing tool for wafer level package and method of placing dies Wen-Kun Yang, Wen-Pin Yang 2011-07-26
7667318 Fan out type wafer level package structure and method of the same Wen-Kun Yang, Wen-Pin Yang 2010-02-23
7557437 Fan out type wafer level package structure and method of the same Wen-Kun Yang, Wen-Pin Yang 2009-07-07
7459781 Fan out type wafer level package structure and method of the same Wen-Kun Yang, Wen-Pin Yang 2008-12-02
7262081 Fan out type wafer level package structure and method of the same Wen-Kun Yang, Wen-Pin Yang 2007-08-28
7224061 Package structure Wen-Kun Yang, Wen-Bin Sun, Ming-Hui Lin, Chao-Nan Chou, Chih-Wei Lin 2007-05-29
7196408 Fan out type wafer level package structure and method of the same Wen-Kun Yang, Wen-Pin Yang 2007-03-27
6236567 Electronic device package with enhanced heat dissipation effect 2001-05-22
6096250 Process for releasing a runner from an electronic device package on a laminate plate 2000-08-01
6087586 Chip scale package 2000-07-11
6068129 Indicating adhesion status between substrate and encapsulant of a packaged electronic device 2000-05-30
5851337 Method of connecting TEHS on PBGA and modified connecting structure 1998-12-22