Issued Patents All Time
Showing 26–29 of 29 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6272655 | Method of reducing test time for NVM cell-based FPGA | Timothy Saxe | 2001-08-07 |
| 6137728 | Nonvolatile reprogrammable interconnect cell with programmable buried source/drain in sense transistor | Jack Peng, Robert M. Salter, III, Kyung Joon Han, Robert U. Broze | 2000-10-24 |
| 6125059 | Method for erasing nonvolatile memory cells in a field programmable gate array | — | 2000-09-26 |
| 6072720 | Nonvolatile reprogrammable interconnect cell with programmable buried bitline | Jack Peng, Robert M. Salter, III, Kyung Joon Han, Robert U. Broze, Victor Levchenko | 2000-06-06 |