Issued Patents All Time
Showing 26–50 of 159 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9754948 | Non-volatile programmable memory cell and array for programmable logic array | Fethi Dhaoui, Frank Hawley, Leslie Richard Wilkinson | 2017-09-05 |
| 9755072 | High voltage device fabricated using low-voltage processes | Fengliang Xue, Fethi Dhaoui | 2017-09-05 |
| 9520448 | Compact ReRAM based PFGA | Fethi Dhaoui | 2016-12-13 |
| 9484904 | Gate boosting transmission gate | — | 2016-11-01 |
| 9444464 | Compact ReRAM based FPGA | Fethi Dhaoui | 2016-09-13 |
| 9368623 | High voltage device fabricated using low-voltage processes | Fengliang Xue, Fethi Dhaoui | 2016-06-14 |
| 9325321 | Background auto-refresh apparatus and method for non-volatile memory array | — | 2016-04-26 |
| 9306573 | Apparatus and method for detecting and preventing laser interrogation of an FPGA integrated circuit | — | 2016-04-05 |
| 9287278 | Non-volatile push-pull non-volatile memory cell having reduced operation disturb and process for manufacturing same | Fethi Dhaoui | 2016-03-15 |
| 9275990 | Circuit and method for reducing BVii on highly overdriven devices | Fethi Dhaoui | 2016-03-01 |
| 9159428 | Auto-refresh method for SONOS non-volatile memory array | — | 2015-10-13 |
| 9147836 | Layouts for resistive RAM cells | Jonathan W. Greene, Frank Hawley | 2015-09-29 |
| 9106232 | SONOS FPGA architecture having fast data erase and disable feature | — | 2015-08-11 |
| 9093517 | TID hardened and single event transient single event latchup resistant MOS transistors and fabrication process | Ben A. Schmid, Fethi Dhaoui | 2015-07-28 |
| 8981328 | Back to back resistive random access memory cells | Jonathan W. Greene, Frank Hawley | 2015-03-17 |
| 8723151 | Front to back resistive random access memory cells | Jonathan W. Greene, Frank Hawley | 2014-05-13 |
| 8633548 | Non-volatile programmable memory cell and array for programmable logic array | Fethi Dhaoui, Frank Hawley, Leslie Richard Wilkinson | 2014-01-21 |
| 8570819 | Non-volatile memory array architecture optimized for hi-reliability and commercial markets | Fethi Dhaoui | 2013-10-29 |
| 8415650 | Front to back resistive random access memory cells | Jonathan W. Greene, Frank Hawley | 2013-04-09 |
| 8320178 | Push-pull programmable logic device cell | — | 2012-11-27 |
| 8269204 | Back to back resistive random access memory cells | Jonathan W. Greene, Frank Hawley | 2012-09-18 |
| 8269203 | Resistive RAM devices for programmable logic devices | Jonathan W. Greene, Frank Hawley | 2012-09-18 |
| 8258567 | Non-volatile two-transistor programmable logic cell and array layout | Fethi Dhaoui, Vidyadhara Bellippady, Zhigang Wang | 2012-09-04 |
| 8120955 | Array and control method for flash based FPGA cell | Zhigang Wang, Fethi Dhaoui, Vidyadhara Bellippady | 2012-02-21 |
| 7956404 | Non-volatile two-transistor programmable logic cell and array layout | Fethi Dhaoui, Vidyadhara Bellippady, William C. Plants, Zhigang Wang | 2011-06-07 |