Issued Patents All Time
Showing 51–57 of 57 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7902029 | Process for fabricating a self-aligned deposited source/drain insulated gate field-effect transistor | Daniel E. Grupp, Daniel J. Connelly, Carl M. Faulkner | 2011-03-08 |
| 7851325 | Strained semiconductor using elastic edge relaxation, a buried stressor layer and a sacrificial stressor layer | R. Stockton Gaines, Daniel J. Connelly | 2010-12-14 |
| 7816240 | Method for making semiconductor insulated-gate field-effect transistor having multilayer deposited metal source(s) and/or drain(s) | Carl M. Faulkner, Daniel J. Connelly, Daniel E. Grupp | 2010-10-19 |
| 7700416 | Tensile strained semiconductor on insulator using elastic edge relaxation and a sacrificial stressor layer | Daniel J. Connelly, R. Stockton Gaines | 2010-04-20 |
| 7612365 | Strained silicon with elastic edge relaxation | — | 2009-11-03 |
| 7338834 | Strained silicon with elastic edge relaxation | — | 2008-03-04 |
| 6847063 | Semiconductor device | Teruhito Ohnishi, Koichiro Yuki, Shigeki Sawada, Keiichiro Shimizu, Koichi Hasegawa +1 more | 2005-01-25 |