Issued Patents 2025
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12426333 | Polysilicon design for replacement gate technology | Harry-Hak-Lay Chuang, Sheng-Chen Chung, Chiung-Han Yeh, Lee-Wee Teo, Yu-Ying Hsu +1 more | 2025-09-23 |
| 12414361 | Method of manufacturing a semiconductor device | Yi-Sheng Chen, Fu-Jier Fan, Jung-Hui Kao, Yi-Huan Chen, Kau-Chu Lin | 2025-09-09 |
| 12363998 | Recessed gate for an MV device | Yi-Huan Chen, Chien-Chih Chou, Ta-Wei Lin, Hsiao-Chin Tuan, Alexander Kalnitsky +2 more | 2025-07-15 |
| 12356658 | Semiconductor structure and method of forming the same | Yi-Huan Chen, Chien-Chih Chou, Szu-Hsien Liu, Huan-Chih Yuan, Jhu-Min Song | 2025-07-08 |
| 12272686 | Semiconductor structure and manufacturing method of the same | Fu-Jier Fan, Alexander Kalnitsky, Jhu-Min Song | 2025-04-08 |
| 12261218 | Semiconductor structure and method of forming the same | Yi-Huan Chen, Chien-Chih Chou, Szu-Hsien Liu | 2025-03-25 |
| 12255207 | Boundary design for high-voltage integration on HKMG technology | Yi-Huan Chen, Chien-Chih Chou, Alexander Kalnitsky, Ming Chyi Liu, Shih-Chung Hsiao +1 more | 2025-03-18 |
| 12243787 | Method of forming testing module and method for using the same | Jen-Yuan Chang, Jung-Hui Kao | 2025-03-04 |
| 12211926 | Method and related apparatus for reducing gate-induced drain leakage in semiconductor devices | Chien-Chih Chou, Hsiao-Chin Tuan, Yi-Huan Chen, Alexander Kalnitsky | 2025-01-28 |
| 12191365 | Thicker corner of a gate dielectric structure around a recessed gate electrode for an MV device | Yi-Huan Chen, Chien-Chih Chou, Alexander Kalnitsky, Szu-Hsien Liu, Huan-Chih Yuan | 2025-01-07 |