Issued Patents 2024
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12057185 | Voltage calibration scans to reduce memory device overhead | Kishore Kumar Muchherla, Mustafa N. Kaynak, Sivagnanam Parthasarathy, Xiangang Luo, Peter Feeley +4 more | 2024-08-06 |
| 11966616 | Voltage bin calibration based on a voltage distribution reference voltage | Kishore Kumar Muchherla, Devin M. Batutis, Xiangang Luo, Mustafa N. Kaynak, Peter Feeley +2 more | 2024-04-23 |
| 11941277 | Combination scan management for block families of a memory device | Michael Sheperek, Larry J. Koudele, Vamsi Pavan Rayaprolu | 2024-03-26 |
| 11928347 | Managing voltage bin selection for blocks of a memory device | Kishore Kumar Muchherla, Mustafa N. Kaynak, Peter Feeley, Sampath K. Ratnam, Sivagnanam Parthasarathy +2 more | 2024-03-12 |
| 11915776 | Error avoidance based on voltage distribution parameters of block families | Michael Sheperek, Kishore Kumar Muchherla, Mustafa N. Kaynak, Larry J. Koudele | 2024-02-27 |
| 11886726 | Block family-based error avoidance for memory devices | Michael Sheperek, Kishore Kumar Muchherla, Mustafa N. Kaynak, Vamsi Pavan Rayaprolu, Bruce A. Liikanen +3 more | 2024-01-30 |
| 11868639 | Providing recovered data to a new memory cell at a memory sub-system based on an unsuccessful error correction operation | Sampath K. Ratnam, Vamsi Pavan Rayaprolu, Mustafa N. Kaynak, Sivagnanam Parthasarathy, Kishore Kumar Muchherla +2 more | 2024-01-09 |