Issued Patents 2023
Showing 1–25 of 29 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11848040 | Memory device and reference circuit thereof | Chia-Fu Lee, Hon-Jarn Lin, Yi-Chun Shih | 2023-12-19 |
| 11797831 | Method and apparatus for defect-tolerant memory based artificial neural network | Win-San Khwa, Yi-Chun Shih, Chien-Yin Liu | 2023-10-24 |
| 11797034 | Low-dropout voltage regulation circuit | Yen-An Chang, Chia-Fu Lee, Yi-Chun Shih | 2023-10-24 |
| 11791006 | Non-volatile memory circuit | Gu-Huan Li, Chen-Ming Hung | 2023-10-17 |
| 11783870 | Sense amplifier | Chia-Fu Lee, Hon-Jarn Lin | 2023-10-10 |
| 11783873 | Circuits and methods for compensating a mismatch in a sense amplifier | Ku-Feng Lin, Yi-Chun Shih, Chia-Fu Lee | 2023-10-10 |
| 11762732 | Memory error detection and correction | Hiroki Noguchi, Hsueh-Chih Yang, Randy B. Osborne, Win-San Khwa | 2023-09-19 |
| 11755410 | Systems and methods for correcting data errors in memory | Ching-Huang Wang, Yi-Chun Shih, Meng-Chun Shih, C. Y. Wang | 2023-09-12 |
| 11742024 | Memory device comprising source line coupled to multiple memory cells and method of operation | Cheng-Hsiung Kuo, Chung-Chieh Chen | 2023-08-29 |
| 11742021 | Memory device with write pulse trimming | Hiroki Noguchi, Yih Wang | 2023-08-29 |
| 11735263 | Memory cell array circuit and method of forming the same | Chin-I Su, Chung-Cheng Chou, Zheng-Jun Lin | 2023-08-22 |
| 11735238 | Memory device | Chien-An Lai, Chung-Cheng Chou | 2023-08-22 |
| 11720130 | On-chip power regulation system for MRAM operation | Yen-An Chang, Chieh-Pu Lo, Yi-Chun Shih, Chia-Fu Lee | 2023-08-08 |
| 11714717 | Method of correcting errors in a memory array and method of screening weak bits in the same | Chia-Fu Lee, Chien-Yin Liu, Yi-Chun Shih, Kuan-Chun Chen, Hsueh-Chih Yang +1 more | 2023-08-01 |
| 11693560 | SRAM-based cell for in-memory computing and hybrid computations/storage memory architecture | Chi-Fu LEE, Jonathan Tsung-Yung Chang | 2023-07-04 |
| 11688436 | Sense amplifier and operating method for non-volatile memory with reduced need on adjusting offset to compensate the mismatch | Ku-Feng Lin | 2023-06-27 |
| 11681468 | Memory device for scheduling maximum number of memory macros write operations at re-arranged time intervals | Hiroki Noguchi, Shih-Lien Linus Lu, Yih Wang | 2023-06-20 |
| 11651826 | One time programmable memory | — | 2023-05-16 |
| 11646079 | Memory cell including programmable resistors with transistor components | Maybe Chen, Yun-Sheng Chen, Wen-Zhang Lin, Jonathan Tsung-Yung Chang, Chrong-Jung Lin +2 more | 2023-05-09 |
| 11641193 | Latch | Chia-Fu Lee, Hon-Jarn Lin | 2023-05-02 |
| 11636884 | Back-up and restoration of register data | — | 2023-04-25 |
| 11636896 | Memory cell array circuit and method of forming the same | Chin-I Su, Chung-Cheng Chou, Zheng-Jun Lin | 2023-04-25 |
| 11621037 | Memory with symmetric read current profile | Yuhsiang Chen, Shao-Yu Chou, Chun-Hao Chang, Min-Shin Wu | 2023-04-04 |
| 11621040 | System and method applied with computing-in-memory | Meng-Fan Chang, May-Be Chen, Cheng Xue, Je Syu Liu | 2023-04-04 |
| 11609815 | Semicoductor device and operation method thereof | Zheng-Jun Lin, Pei-Ling Tseng, Hsueh-Chih Yang, Chung-Cheng Chou | 2023-03-21 |