Issued Patents 2023
Showing 1–25 of 29 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11856116 | Method and apparatus for protecting embedded software | — | 2023-12-26 |
| 11856115 | Physical unclonable function (PUF) security key generation | Saman M. I. Adham, Peter Noel | 2023-12-26 |
| 11856114 | Device signature based on trim and redundancy information | Katherine H. Chiang | 2023-12-26 |
| 11817402 | Integrated circuit layout, integrated circuit, and method for fabricating the same | — | 2023-11-14 |
| 11817139 | Memory device having bitline segmented into bitline segments and related method for operating memory device | Fong-Yuan Chang, Yi-Chun Shih | 2023-11-14 |
| 11811953 | Method and apparatus for logic cell-based PUF generators | Cormac Michael O'Connell | 2023-11-07 |
| 11802800 | Capacitor-based temperature-sensing device | — | 2023-10-31 |
| 11791291 | Multiplexer cell and semiconductor device having camouflage design, and method for forming multiplexer cell | — | 2023-10-17 |
| 11783092 | Systems and methods for classifying PUF signature modules of integrated circuits | Cheng-En Lee | 2023-10-10 |
| 11770934 | Semiconductor structure and method of fabricating the same | Bo-Feng Young, Sai-Hooi Yeong, Chia-En Huang, Yih Wang, Yu-Ming Lin | 2023-09-26 |
| 11749370 | Method of testing a memory circuit and memory circuit | Chao-I Wu, Sai-Hooi Yeong | 2023-09-05 |
| 11748192 | System and method of reducing logic for multi-bit error correcting codes | — | 2023-09-05 |
| 11740960 | Detection and correction of data bit errors using error correction codes | — | 2023-08-29 |
| 11734111 | Integrated circuit and method of operating same | — | 2023-08-22 |
| 11727182 | PUF cell array, system and method of manufacturing same | Cheng-En Lee | 2023-08-15 |
| 11720458 | Memory block age detection | — | 2023-08-08 |
| 11714717 | Method of correcting errors in a memory array and method of screening weak bits in the same | Yu-Der Chih, Chia-Fu Lee, Chien-Yin Liu, Yi-Chun Shih, Kuan-Chun Chen +1 more | 2023-08-01 |
| 11714705 | Memory address protection circuit and method of operating same | Saman M. I. Adham, Ramin SHARIAT-YAZDI | 2023-08-01 |
| 11681468 | Memory device for scheduling maximum number of memory macros write operations at re-arranged time intervals | Hiroki Noguchi, Yu-Der Chih, Yih Wang | 2023-06-20 |
| 11664258 | Method for PUF generation using variations in transistor threshold voltage and subthreshold leakage current | Cormac Michael O'Connell | 2023-05-30 |
| 11652096 | Memory cell array and method of manufacturing same | — | 2023-05-16 |
| 11626157 | SRAM power-up random number generator | Jui-Che Tsai, Chen-Lin Yang, Yu-Hao Hsu | 2023-04-11 |
| 11621036 | Method of operating an integrated circuit and integrated circuit | — | 2023-04-04 |
| 11621258 | Memory circuit and method of operating same | — | 2023-04-04 |
| 11605422 | Memory circuit configuration | — | 2023-03-14 |