| 11837543 |
Frontside-to-backside intermixing architecture for coupling a frontside network to a backside network |
Andy Wangkun Chen, Sriram Thyagarajan, Sony, Ettore Amirante, Ayush Kulshrestha |
2023-12-05 |
| 11831341 |
Data compressor logic circuit |
Shardendu Shekhar, Andy Wangkun Chen |
2023-11-28 |
| 11688444 |
Wordline driver architecture |
Akash Bangalore Srinivasa, Andy Wangkun Chen, Sreebin Sreedhar, Balaji Ravikumar, Penaka Phani Goberu +1 more |
2023-06-27 |
| 11676656 |
Memory architecture with DC biasing |
Andy Wangkun Chen, Rajiv Kumar Sisodia, Sriram Thyagarajan |
2023-06-13 |
| 11664086 |
Column redundancy techniques |
Andy Wangkun Chen, Bikas Maiti, Vivek Nautiyal |
2023-05-30 |
| 11631439 |
Flexible sizing and routing architecture |
Sriram Thyagarajan, Munish Kumar, Andy Wangkun Chen, Rajiv Kumar Sisodia |
2023-04-18 |
| 11624777 |
Slew-load characterization |
Sriram Thyagarajan, Pratik Ghanshambhai Satasia, Andy Wangkun Chen, Mouli Rajaram Chollangi |
2023-04-11 |
| 11588477 |
Pulse stretcher circuitry |
Shri Sagar Dwivedi, Fakhruddin Ali Bohra, Lalit Gupta, Gus Yeung |
2023-02-21 |
| 11586445 |
Modular gated multiplier circuitry and multiplication technique |
Shardendu Shekhar, Andy Wangkun Chen, Anil Kumar Baratam, James Dennis Dodrill |
2023-02-21 |
| 11568926 |
Latch circuitry for memory applications |
Andy Wangkun Chen, Teresa Louise McLaurin, Frank David Frederick, Richard Slobodnik |
2023-01-31 |
| 11567741 |
Memory compiler techniques |
Mouli Rajaram Chollangi, Sriram Thyagarajan, Hongwei Zhu, Pratik Ghanshambhai Satasia |
2023-01-31 |
| 11557583 |
Cell architecture |
Andy Wangkun Chen, Sriram Thyagarajan, Sony |
2023-01-17 |