Issued Patents 2023
Showing 1–20 of 20 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11847185 | Systems and methods of instructions to accelerate multiplication of sparse matrices using bitmasks that identify non-zero elements | Dan Baum, Chen Koren, Elmoustapha Ould-Ahmed-Vall, Michael Espig, Christopher J. Hughes +3 more | 2023-12-19 |
| 11847452 | Systems, methods, and apparatus for tile configuration | Menachem Adelman, Robert Valentine, Zeev Sperber, Mark J. Charney, Bret L. Toll +6 more | 2023-12-19 |
| 11816483 | Systems, methods, and apparatuses for matrix operations | Raanan Sade, Simon Rubanovich, Amit Gradstein, Zeev Sperber, Robert Valentine +5 more | 2023-11-14 |
| 11809869 | Systems and methods to store a tile register pair to memory | Raanan Sade, Simon Rubanovich, Amit Gradstein, Zeev Sperber, Robert Valentine +5 more | 2023-11-07 |
| 11789729 | Systems and methods for computing dot products of nibbles in two tile operands | Raanan Sade, Simon Rubanovich, Amit Gradstein, Zeev Sperber, Robert Valentine +4 more | 2023-10-17 |
| 11768681 | Apparatus and method for vector multiply and accumulate of packed bytes | Dipankar Das, Robert Valentine, Mark J. Charney | 2023-09-26 |
| 11748103 | Systems and methods for performing matrix compress and decompress instructions | Dan Baum, Michael Espig, James D. Guilford, Wajdi K. Feghali, Raanan Sade +7 more | 2023-09-05 |
| 11714648 | Systems for performing instructions to quickly convert and use tiles as 1D vectors | Bret L. Toll, Christopher J. Hughes, Dan Baum, Elmoustapha Ould-Ahmed-Vall, Raanan Sade +2 more | 2023-08-01 |
| 11714642 | Systems, methods, and apparatuses for tile store | Robert Valentine, Menachem Adelman, Elmoustapha Ould-Ahmed-Vall, Bret L. Toll, Milind B. Girkar +9 more | 2023-08-01 |
| 11675590 | Systems and methods for performing instructions to transform matrices into row-interleaved format | Raanan Sade, Robert Valentine, Bret L. Toll, Christopher J. Hughes, Elmoustapha Ould-Ahmed-Vall +1 more | 2023-06-13 |
| 11669586 | Systems and methods for combining low-mantissa units to achieve and exceed FP64 emulation of matrix multiplication | Gregory Henry | 2023-06-06 |
| 11669326 | Systems, methods, and apparatuses for dot product operations | Raanan Sade, Simon Rubanovich, Amit Gradstein, Zeev Sperber, Robert Valentine +5 more | 2023-06-06 |
| 11645077 | Systems and methods to zero a tile register pair | Raanan Sade, Simon Rubanovich, Amit Gradstein, Zeev Sperber, Robert Valentine +6 more | 2023-05-09 |
| 11614936 | Systems and methods for performing 16-bit floating-point matrix dot product instructions | Robert Valentine, Mark J. Charney, Raanan Sade, Menachem Adelman, Zeev Sperber +2 more | 2023-03-28 |
| 11609762 | Systems and methods to load a tile register pair | Raanan Sade, Simon Rubanovich, Amit Gradstein, Zeev Sperber, Robert Valentine +5 more | 2023-03-21 |
| 11590968 | Methods and apparatus to mitigate hard-braking events | Sara S. Baghsorkhi, Justin E. Gottschlich, Mohammad Mejbah Ul Alam, Shengtian Zhou, Jeffrey Ota | 2023-02-28 |
| 11579883 | Systems and methods for performing horizontal tile operations | Christopher J. Hughes, Bret L. Toll, Dan Baum, Elmoustapha Ould-Ahmed-Vall, Raanan Sade +2 more | 2023-02-14 |
| 11579880 | Systems for performing instructions to quickly convert and use tiles as 1D vectors | Bret L. Toll, Christopher J. Hughes, Dan Baum, Elmoustapha Ould-Ahmed-Vall, Raanan Sade +2 more | 2023-02-14 |
| 11567765 | Systems, methods, and apparatuses for tile load | Robert Valentine, Menachem Adelman, Milind B. Girkar, Zeev Sperber, Mark J. Charney +9 more | 2023-01-31 |
| 11544057 | Computer processor for higher precision computations using a mixed-precision decomposition of operations | Gregory Henry | 2023-01-03 |