MC

Mark J. Charney

IN Intel: 30 patents #28 of 4,378Top 1%
Overall (2023): #865 of 537,848Top 1%
30
Patents 2023

Issued Patents 2023

Showing 25 most recent of 30 patents

Patent #TitleCo-InventorsDate
11847185 Systems and methods of instructions to accelerate multiplication of sparse matrices using bitmasks that identify non-zero elements Dan Baum, Chen Koren, Elmoustapha Ould-Ahmed-Vall, Michael Espig, Christopher J. Hughes +3 more 2023-12-19
11847452 Systems, methods, and apparatus for tile configuration Menachem Adelman, Robert Valentine, Zeev Sperber, Bret L. Toll, Rinat Rappoport +6 more 2023-12-19
11816483 Systems, methods, and apparatuses for matrix operations Raanan Sade, Simon Rubanovich, Amit Gradstein, Zeev Sperber, Alexander Heinecke +5 more 2023-11-14
11809869 Systems and methods to store a tile register pair to memory Raanan Sade, Simon Rubanovich, Amit Gradstein, Zeev Sperber, Alexander Heinecke +5 more 2023-11-07
11809867 Apparatus and method for performing dual signed and unsigned multiplication of packed data elements Venkateswara Madduri, Elmoustapha Ould-Ahmed-Vall, Jesus Corbal, Robert Valentine, Binwei Yang 2023-11-07
11789729 Systems and methods for computing dot products of nibbles in two tile operands Raanan Sade, Simon Rubanovich, Amit Gradstein, Zeev Sperber, Alexander Heinecke +4 more 2023-10-17
11782709 Systems, apparatuses, and methods for addition of partial products Robert Valentine, Galina Ryvchin, Piotr Majcher, Elmoustapha Ould-Ahmed-Vall, Jesus Corbal +4 more 2023-10-10
11768681 Apparatus and method for vector multiply and accumulate of packed bytes Alexander Heinecke, Dipankar Das, Robert Valentine 2023-09-26
11755323 Apparatus and method for complex by complex conjugate multiplication Venkateswara Madduri, Elmoustapha Ould-Ahmed-Vall, Jesus Corbal, Robert Valentine, Binwei Yang 2023-09-12
11748103 Systems and methods for performing matrix compress and decompress instructions Dan Baum, Michael Espig, James D. Guilford, Wajdi K. Feghali, Raanan Sade +7 more 2023-09-05
11740904 Vector friendly instruction format and execution thereof Robert Valentine, Jesus Corbal San Adrian, Roger Espasa Sans, Robert Dale Cavin, Bret L. Toll +14 more 2023-08-29
11714642 Systems, methods, and apparatuses for tile store Robert Valentine, Menachem Adelman, Elmoustapha Ould-Ahmed-Vall, Bret L. Toll, Milind B. Girkar +9 more 2023-08-01
11714648 Systems for performing instructions to quickly convert and use tiles as 1D vectors Bret L. Toll, Christopher J. Hughes, Dan Baum, Elmoustapha Ould-Ahmed-Vall, Raanan Sade +2 more 2023-08-01
11709961 Instruction execution that broadcasts and masks data values at different levels of granularity Elmoustapha Ould-Ahmed-Vall, Robert Valentine, Jesus Corbal, Bret L. Toll 2023-07-25
11704124 Instructions for vector multiplication of unsigned words with rounding Venkateswara Madduri, Carl Murray, Elmoustapha Ould-Ahmed-Vall, Robert Valentine, Jesus Corbal 2023-07-18
11698787 Interruptible and restartable matrix multiplication instructions, processors, methods, and systems Edward T. Grochowski, Asit K. Mishra, Robert Valentine, Simon C. Steely, Jr. 2023-07-11
11693691 Systems, methods, and apparatuses for heterogeneous computing Rajesh M. Sankaran, Gilbert Neiger, Narayan Ranganathan, Stephen R. Van Doren, Joseph Nuzman +22 more 2023-07-04
11675590 Systems and methods for performing instructions to transform matrices into row-interleaved format Raanan Sade, Robert Valentine, Bret L. Toll, Christopher J. Hughes, Alexander Heinecke +1 more 2023-06-13
11669326 Systems, methods, and apparatuses for dot product operations Raanan Sade, Simon Rubanovich, Amit Gradstein, Zeev Sperber, Alexander Heinecke +5 more 2023-06-06
11656870 Systems, apparatuses, and methods for dual complex multiply add of signed words Elmoustapha Ould-Ahmed-Vall, Venkateswara Madduri, Robert Valentine 2023-05-23
11645077 Systems and methods to zero a tile register pair Raanan Sade, Simon Rubanovich, Amit Gradstein, Zeev Sperber, Alexander Heinecke +6 more 2023-05-09
11645080 Apparatuses, methods, and systems for instructions to request a history reset of a processor core Eliezer Weissmann, Michael Mishaeli, Robert Valentine, Itai Ravid, Jason W. Brandt +3 more 2023-05-09
11614936 Systems and methods for performing 16-bit floating-point matrix dot product instructions Alexander Heinecke, Robert Valentine, Raanan Sade, Menachem Adelman, Zeev Sperber +2 more 2023-03-28
11609762 Systems and methods to load a tile register pair Raanan Sade, Simon Rubanovich, Amit Gradstein, Zeev Sperber, Alexander Heinecke +5 more 2023-03-21
11579871 Systems, apparatuses, and methods for controllable sine and/or cosine operations Venkateswara Madduri, Elmoustapha Ould-Ahmed-Vall, Robert Valentine, Jesus Corbal, Carl Murray +2 more 2023-02-14