Issued Patents 2022
Showing 1–25 of 31 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11538832 | Semiconductor memory structure and method of manufacturing the same | — | 2022-12-27 |
| 11532746 | Multi-bit memory storage device and method of operating same | Chia-En Huang, Han-Jong Chia, Martin Liu, Sai-Hooi Yeong, Yih Wang | 2022-12-20 |
| 11532694 | Semiconductor device having capacitor and manufacturing method thereof | Te-Hsin Chiu, Wei-Cheng Wu, Te-An Chen | 2022-12-20 |
| 11532640 | Method for manufacturing a three-dimensional memory | Han-Jong Chia, Chung-Te Lin, Feng-Cheng Yang, Sheng-Chen Wang | 2022-12-20 |
| 11532621 | Metal gate modulation to improve kink effect | Te-Hsin Chiu, Wei-Cheng Wu | 2022-12-20 |
| 11527553 | Three-dimensional memory device and method | Han-Jong Chia, Sheng-Chen Wang, Feng-Cheng Yang, Yu-Ming Lin, Chung-Te Lin | 2022-12-13 |
| 11515212 | Method of manufacturing semiconductor devices having controlled S/D epitaxial shape | Te-An Chen | 2022-11-29 |
| 11508816 | Semiconductor structure and method of forming the same | Te-An Chen | 2022-11-22 |
| 11495618 | Three-dimensional memory device and method | Han-Jong Chia, Sheng-Chen Wang, Feng-Cheng Yang, Yu-Ming Lin, Chung-Te Lin | 2022-11-08 |
| 11488971 | Embedded memory with improved fill-in window | Te-Hsin Chiu, Wei-Cheng Wu | 2022-11-01 |
| 11456293 | Polysilicon resistor structures | Wen-Tuo Huang, Yong-Shiuan Tsair | 2022-09-27 |
| 11450660 | Semiconductor device and method of fabricating the same | Te-An Chen | 2022-09-20 |
| 11424339 | Integrated chip and method of forming thereof | Chia-En Huang | 2022-08-23 |
| 11423966 | Memory array staircase structure | Han-Jong Chia, Sheng-Chen Wang, Feng-Cheng Yang, Yu-Ming Lin, Chung-Te Lin | 2022-08-23 |
| 11417739 | Contacts for semiconductor devices and methods of forming the same | Sai-Hooi Yeong, Chi On Chui | 2022-08-16 |
| 11404410 | Semiconductor device having different voltage regions | Te-An Chen | 2022-08-02 |
| 11404091 | Memory array word line routing | Chenchen Jacob Wang, Yi-Ching Liu, Han-Jong Chia, Sai-Hooi Yeong, Yu-Ming Lin +1 more | 2022-08-02 |
| 11404099 | Using split word lines and switches for reducing capacitive loading on a memory system | Sheng-Chen Wang, Chia-En Huang, Yi-Ching Liu | 2022-08-02 |
| 11380769 | Select gate spacer formation to facilitate embedding of split gate flash memory | Chih-Ren Hsieh | 2022-07-05 |
| 11355551 | Multi-level magnetic tunnel junction NOR device with wrap-around gate electrodes and methods for forming the same | Han-Jong Chia, Bo-Feng Young, Sai-Hooi Yeong, Chenchen Jacob Wang, Yu-Ming Lin | 2022-06-07 |
| 11355516 | Three-dimensional memory device and method | Feng-Cheng Yang, Sheng-Chen Wang, Han-Jong Chia, Chung-Te Lin | 2022-06-07 |
| 11355507 | Semiconductor device and manufacturing method thereof | Te-An Chen | 2022-06-07 |
| 11349010 | Schottky barrier diode with reduced leakage current and method of forming the same | Te-An Chen | 2022-05-31 |
| 11342334 | Memory cell and method | Han-Jong Chia, Sai-Hooi Yeong, Chi On Chui, Yu-Ming Lin | 2022-05-24 |
| 11333827 | Protective ring structure to increase waveguide performance | Yung-Chang Chang | 2022-05-17 |