| 11520699 |
Using a common pool of blocks for user data and a system data structure |
Kishore Kumar Muchherla, Peter Feeley, Sampath K. Ratnam, Ashutosh Malshe |
2022-12-06 |
| 11513835 |
Notifying memory system of host events via modulated reset signals |
Qing Liang, Jonathan S. Parry, Stephen Hanna |
2022-11-29 |
| 11403013 |
Managed NVM adaptive cache management |
Carla L. Christensen, Jianmin Huang, Sebastien Andre Jean |
2022-08-02 |
| 11403228 |
Memory device page program sequence |
Jianmin Huang, Tomoko Ogura Iwasaki, Kishore Kumar Muchherla, Peter Feeley |
2022-08-02 |
| 11348636 |
On-demand high performance mode for memory write commands |
Jianmin Huang |
2022-05-31 |
| 11307951 |
Memory device with configurable performance and defectivity management |
Jianmin Huang, Xiangang Luo |
2022-04-19 |
| 11294585 |
Sequential data optimized sub-regions in storage devices |
David Aaron Palmer, Sean L. Manion, Jonathan S. Parry, Stephen Hanna, Qing Liang +2 more |
2022-04-05 |
| 11237737 |
SLC cache management |
Sebastien Andre Jean, Kishore Kumar Muchherla, Ashutosh Malshe, Jianmin Huang |
2022-02-01 |
| 11238939 |
Secure erase for data corruption |
Ting Luo, Harish Reddy Singidi, Jianmin Huang, Preston A. Thomson, Sebastien Andre Jean |
2022-02-01 |