Issued Patents 2022
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11520525 | Integrated pivot table in a logical-to-physical mapping having entries and subsets associated via a flag | Giuseppe D'Eliseo, Luca Porzio | 2022-12-06 |
| 11513835 | Notifying memory system of host events via modulated reset signals | Qing Liang, Jonathan S. Parry, Kulachet Tanpairoj | 2022-11-29 |
| 11347659 | Low cost and low latency logical unit erase | — | 2022-05-31 |
| 11329673 | Memory error correction based on layered error detection | — | 2022-05-10 |
| 11294838 | Signaling mechanism for bus inversion | Jonathan S. Parry | 2022-04-05 |
| 11294585 | Sequential data optimized sub-regions in storage devices | David Aaron Palmer, Sean L. Manion, Jonathan S. Parry, Qing Liang, Nadav Grosz +2 more | 2022-04-05 |
| 11226894 | Host-based flash memory maintenance techniques | David Aaron Palmer, Christian M. Gyllenskog, Jonathan S. Parry | 2022-01-18 |