JH

Jianmin Huang

Micron: 20 patents #25 of 1,508Top 2%
🗺 California: #322 of 65,961 inventorsTop 1%
Overall (2022): #2,018 of 548,613Top 1%
20
Patents 2022

Issued Patents 2022

Showing 1–20 of 20 patents

Patent #TitleCo-InventorsDate
11513889 Parity protection Chun Sum Yeung, Falgun G. Trivedi, Harish Reddy Singidi, Xiangang Luo, Preston A. Thomson +1 more 2022-11-29
11488670 Temperature sensitive NAND programming Xiangang Luo, Jung Sheng Hoei, Harish Reddy Singidi, Ting Luo, Ankit Vinod Vashi 2022-11-01
11475974 Memory device virtual blocks using half good blocks Sri Rama Namala, Jung Sheng Hoei, Ashutosh Malshe, Xiangang Luo 2022-10-18
11436078 NAND parity information techniques for systems with limited RAM Harish Reddy Singidi, Xiangang Luo, Kishore Kumar Muchherla, Ashutosh Malshe, Vamsi Pavan Rayaprolu +1 more 2022-09-06
11409661 Logical-to-physical mapping Xiangang Luo 2022-08-09
11403013 Managed NVM adaptive cache management Carla L. Christensen, Sebastien Andre Jean, Kulachet Tanpairoj 2022-08-02
11403228 Memory device page program sequence Kulachet Tanpairoj, Tomoko Ogura Iwasaki, Kishore Kumar Muchherla, Peter Feeley 2022-08-02
11354052 Memory sub-system media management operation threshold Xiangang Luo, Ashutosh Malshe 2022-06-07
11348636 On-demand high performance mode for memory write commands Kulachet Tanpairoj 2022-05-31
11327884 Self-seeded randomizer for data randomization in flash memory Zhengang Chen 2022-05-10
11321173 Managing storage of multiple plane parity data in a memory sub-system Xiangang Luo, Lakshmi Kalpana Vakati, Harish Reddy Singidi 2022-05-03
11307951 Memory device with configurable performance and defectivity management Xiangang Luo, Kulachet Tanpairoj 2022-04-19
11282567 Sequential SLC read optimization Tomoko Ogura Iwasaki, Tracy D. Evans, Avani F. Trivedi, Aparna U. Limaye 2022-03-22
11281578 Garbage collection in a memory sub-system during a low battery state Aparna U. Limaye, Tracy D. Evans, Tomoko Ogura Iwasaki, Avani F. Trivedi 2022-03-22
11281392 Garbage collection in a memory component using an adjusted parameter Aparna U. Limaye, Avani F. Trivedi, Tomoko Ogura Iwasaki, Tracy D. Evans 2022-03-22
11275512 Asynchronous power loss impacted data structure Xiangang Luo, Ting Luo 2022-03-15
11256617 Metadata aware copyback for memory devices Zhengang Chen 2022-02-22
11237737 SLC cache management Kulachet Tanpairoj, Sebastien Andre Jean, Kishore Kumar Muchherla, Ashutosh Malshe 2022-02-01
11238939 Secure erase for data corruption Ting Luo, Kulachet Tanpairoj, Harish Reddy Singidi, Preston A. Thomson, Sebastien Andre Jean 2022-02-01
11216349 Reactive read based on metrics to screen defect prone memory blocks Harish Reddy Singidi, Vamsi Pavan Rayaprolu, Kishore Kumar Muchherla, Xiangang Luo, Ashutosh Malshe 2022-01-04