Issued Patents 2021
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11211493 | Apparatus and method of modulating threshold voltage for fin field effect transistor (FinFET) and nanosheet FET | Joon Goo Hong | 2021-12-28 |
| 11189600 | Method of forming sacrificial self-aligned features for assisting die-to-die and die-to-wafer direct bonding | Wei-E Wang, Vassilios Gerousis | 2021-11-30 |
| 11158738 | Method of forming isolation dielectrics for stacked field effect transistors (FETs) | Wei-E Wang, Vassilios Gerousis | 2021-10-26 |
| 11088258 | Method of forming multiple-Vt FETs for CMOS circuit applications | Wei-E Wang | 2021-08-10 |
| 11081590 | Metal oxide semiconductor field effect transistor with crystalline oxide layer on a III-V material | Wei-E Wang, Robert M. Wallace, Xiaoye Qin | 2021-08-03 |
| 10971420 | Method of forming a thermal shield in a monolithic 3-D integrated circuit | Wei-E Wang, Vassilios Gerousis | 2021-04-06 |
| 10964698 | Field effect transistor with decoupled channel and methods of manufacturing the same | Borna J. Obradovic | 2021-03-30 |
| 10957786 | FinFET with reduced extension resistance and methods of manufacturing the same | Joon Goo Hong, Borna J. Obradovic | 2021-03-23 |
| 10930768 | Low current leakage finFET and methods of making the same | Joon Goo Hong, Borna J. Obradovic, Kang-ill Seo | 2021-02-23 |
| 10916513 | Method and system for providing a reverse engineering resistant hardware embedded security module | Harsono S. Simka, Ganesh Hegde, Joon Goo Hong, Rwik Sengupta | 2021-02-09 |
| 10910313 | Integrated circuit including field effect transistors having a contact on active gate compatible with a small cell area having a small contacted poly pitch | Rwik Sengupta, Joon Goo Hong, Titash Rakshit | 2021-02-02 |