Issued Patents 2021
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11211493 | Apparatus and method of modulating threshold voltage for fin field effect transistor (FinFET) and nanosheet FET | Mark S. Rodder | 2021-12-28 |
| 11182686 | 4T4R ternary weight cell with high on/off ratio background | Ryan M. Hatcher, Titash Rakshit, Jorge A. Kittl, Rwik Sengupta, Dharmendar Reddy Palle | 2021-11-23 |
| 11101320 | System and method for efficient enhancement of an on/off ratio of a bitcell based on 3T2R binary weight cell with spin orbit torque MJTs (SOT-MTJs) | Ryan M. Hatcher, Titash Rakshit, Jorge A. Kittl, Rwik Sengupta, Dharmendar Reddy Palle | 2021-08-24 |
| 10985103 | Apparatus and method of forming backside buried conductor in integrated circuit | Rwik Sengupta | 2021-04-20 |
| 10957786 | FinFET with reduced extension resistance and methods of manufacturing the same | Borna J. Obradovic, Mark S. Rodder | 2021-03-23 |
| 10930768 | Low current leakage finFET and methods of making the same | Borna J. Obradovic, Kang-ill Seo, Mark S. Rodder | 2021-02-23 |
| 10916513 | Method and system for providing a reverse engineering resistant hardware embedded security module | Harsono S. Simka, Ganesh Hegde, Rwik Sengupta, Mark S. Rodder | 2021-02-09 |
| 10910313 | Integrated circuit including field effect transistors having a contact on active gate compatible with a small cell area having a small contacted poly pitch | Rwik Sengupta, Mark S. Rodder, Titash Rakshit | 2021-02-02 |
| 10886224 | Power distribution network using buried power rail | Vassilios Gerousis, Rwik Sengupta, Kevin Traynor | 2021-01-05 |