Issued Patents 2021
Showing 1–25 of 43 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11190169 | Latch circuit, memory device and method | XiuLi YANG, He-Zhou WAN, Ching-Wei Wu, Wenchao Hao | 2021-11-30 |
| 11189706 | FinFET structure with airgap and method of forming the same | Chien Ning Yao, Kai-Hsuan Lee, Sai-Hooi Yeong, Wei-Yang Lee, Chih-Hao Wang | 2021-11-30 |
| 11171138 | Semiconductor arrangement and method of manufacture | Yu-Xuan Huang, Ching-Wei Tsai | 2021-11-09 |
| 11164786 | Power reduction in finFET structures | Kuo-Cheng Ching, Chih-Hao Wang | 2021-11-02 |
| 11164961 | Epitaxial features confined by dielectric fins and spacers | Kuo-Cheng Ching, Chih-Hao Wang | 2021-11-02 |
| 11164866 | Semiconductor structure and method for manufacturing the same | Shi Ning Ju, Kuo-Cheng Chiang, Chih-Hao Wang, Kuan-Ting Pan, Zhi-Chang Lin | 2021-11-02 |
| 11158721 | Metal oxide interlayer structure for nFET and pFET | Min Cao, Pei-Yu Wang, Sai-Hooi Yeong, Ching-Wei Tsai, Chih-Hao Wang | 2021-10-26 |
| 11158728 | Multi-gate device and related methods | Cheng-Ting Chung, Ching-Wei Tsai | 2021-10-26 |
| 11158634 | Backside PN junction diode | Yu-Xuan Huang, Ching-Wei Tsai, Jam-Wem Lee, Kuo-Ji Chen | 2021-10-26 |
| 11152358 | Vertical structure for semiconductor device | Wang-Chun Huang, Chih-Hao Wang, Ching-Wei Tsai | 2021-10-19 |
| 11145765 | Gate-all-around structure with self substrate isolation and methods of forming the same | Cheng-Ting Chung, Ching-Wei Tsai | 2021-10-12 |
| 11145734 | Semiconductor device with dummy fin and liner and method of forming the same | Jia-Ni Yu, Kuo-Cheng Chiang, Lung-Kun Chu, Mao-Lin Huang, Chung-Wei Hsu +1 more | 2021-10-12 |
| 11139381 | Semiconductor device with gate-all-around (GAA) FETs having inner insulating spacers | Kuo-Cheng Ching, Ching-Wei Tsai, Chih-Hao Wang | 2021-10-05 |
| 11133394 | Semiconductor device and manufacturing method thereof | Wei-Hao Wu, Zhi-Chang Lin, Ting-Hung Hsu | 2021-09-28 |
| 11121037 | Semiconductor device structure and method for forming the same | Ching-Wei Tsai, Yu-Xuan Huang, Chih-Hao Wang, Min Cao, Jung-Hung Chang +3 more | 2021-09-14 |
| 11088255 | Semiconductor devices | Cheng-Ting Chung, Ching-Wei Tsai | 2021-08-10 |
| 11088256 | Semiconductor devices | Cheng-Ting Chung, Ching-Wei Tsai | 2021-08-10 |
| 11088251 | Source/drain contacts for semiconductor devices and methods of forming | Ching-Wei Tsai, Yi-Bo Liao, Cheng-Ting Chung, Yu-Xuan Huang | 2021-08-10 |
| 11081356 | Method for metal gate cut and structure thereof | Pei-Yu Wang, Zhi-Chang Lin, Ching-Wei Tsai | 2021-08-03 |
| 11069793 | Reducing parasitic capacitance for gate-all-around device by forming extra inner spacers | Kuo-Cheng Ching, Chih-Hao Wang, Shi Ning Ju | 2021-07-20 |
| 11038058 | Semiconductor device structure and method for forming the same | Kuo-Cheng Chiang, Shi Ning Ju, Ching-Wei Tsai, Chih-Hao Wang | 2021-06-15 |
| 11037925 | Structure and method of integrated circuit having decouple capacitance | Ching-Wei Tsai, Yu-Xuan Huang, Wei Ju Lee, Chun-Fu Cheng, Chung-Wei Wu | 2021-06-15 |
| 11038061 | Semiconductor device structure and method for forming the same | Kuo-Cheng Chiang, Shi Ning Ju, Ching-Wei Tsai, Chih-Hao Wang | 2021-06-15 |
| 11031418 | Integrated circuit structure and method with hybrid orientation for FinFET | Tzer-Min Shen, Zhiqiang Wu, Chung-Cheng Wu, Ching-Wei Tsai, Chih-Hao Wang +1 more | 2021-06-08 |
| 11031395 | Method of forming high performance MOSFETs having varying channel structures | Tetsu Ohtou, Ching-Wei Tsai, Jiun-Jia Huang, Chi-Hsing Hsu | 2021-06-08 |