Issued Patents 2021
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11199866 | Voltage regulator with power rail tracking | Haruki Mori, Hidehiro Fujiwara, Zhi-Hao Chang, Yangsyu Lin, Yu-Hao Hsu +2 more | 2021-12-14 |
| 11200946 | Low voltage bit-cell | Mahmut Sinangil, Jonathan Tsung-Yung Chang, Yen-Huei Chen, Yen-Ting Lin | 2021-12-14 |
| 11176997 | Memory cell | Hidehiro Fujiwara, Hsien-Yu Pan, Chih-Yu Lin, Yen-Huei Chen, Chien-Chen Lin | 2021-11-16 |
| 11152301 | Memory cell having multi-level word line | Hidehiro Fujiwara, Li-Wen Wang, Yen-Huei Chen | 2021-10-19 |
| 11120868 | Semiconductor memory device using shared data line for read/write operation | Chien-Yuan Chen, Che-Ju Yeh, Hau-Tai Shieh, Cheng Hung Lee, Sahil Preet Singh +3 more | 2021-09-14 |
| 11057025 | Level shifter | Chien-Yuan Chen, Cheng Hung Lee, Hau-Tai Shieh | 2021-07-06 |
| 11048840 | Method for eliminating false paths of a circuit unit to be implemented using a system | Chun-Jiun Dai, Wei Min Chan, Yen-Huei Chen | 2021-06-29 |
| 11043264 | Static random access memory method | Wei-Cheng Wu, Wei Min Chan, Yen-Huei Chen, Ping-Wei Wang | 2021-06-22 |
| 11031055 | Memory macro and method of operating the same | Chien-Kuo Su, Cheng Hung Lee, Chiting Cheng, Jonathan Tsung-Yung Chang, Yen-Huei Chen +2 more | 2021-06-08 |
| 11024633 | SRAM cell word line structure with reduced RC effects | Hidehiro Fujiwara, Wei Min Chan, Chih-Yu Lin, Yen-Huei Chen | 2021-06-01 |
| 11024634 | Semiconductor device having an inter-layer via (ILV), and method of making same | Tsung-Hsien Huang, Hong-Chen Cheng, Cheng Hung Lee | 2021-06-01 |
| 11018142 | Memory cell and method of manufacturing the same | Hidehiro Fujiwara, Hsien-Yu Pan, Chih-Yu Lin, Yen-Huei Chen, Yasutoshi Okuno | 2021-05-25 |
| 11011238 | Floating data line circuits and methods | Manish Arora, Yen-Huei Chen, Nikhil Puri, Yu-Hao Hsu | 2021-05-18 |
| 10991420 | Semiconductor device including distributed write driving arrangement and method of operating same | Hidehiro Fujiwara, Li-Wen Wang, Jonathan Tsung-Yung Chang, Yen-Huei Chen | 2021-04-27 |
| 10971217 | SRAM cell for interleaved wordline scheme | Hidehiro Fujiwara, Hsien-Yu Pan, Yen-Huei Chen, Mahmut Sinangil | 2021-04-06 |
| 10971220 | Write assist for a memory device and methods of forming the same | Sahil Preet Singh, Yen-Huei Chen | 2021-04-06 |
| 10964389 | Memory cell | Hidehiro Fujiwara, Hsien-Yu Pan, Chih-Yu Lin, Yen-Huei Chen, Chien-Chen Lin | 2021-03-30 |
| 10964683 | Memory array circuit and method of manufacturing the same | Hidehiro Fujiwara, Hsien-Yu Pan, Chih-Yu Lin, Yen-Huei Chen, Sahil Preet Singh | 2021-03-30 |
| 10964355 | Memory device with strap cells | Jonathan Tsung-Yung Chang, Cheng Hung Lee, Chi-Ting Cheng, Jhon Jhy Liaw, Yen-Huei Chen | 2021-03-30 |
| 10949100 | Configurable memory storage system | Yu-Hao Hsu, Cheng Hung Lee, Chen-Lin Yang, Chiting Cheng, Fu-An Wu +6 more | 2021-03-16 |
| 10950296 | Latch circuit formed from bit cell | Hua-Hsin Yu, Cheng Hung Lee, Hau-Tai Shieh | 2021-03-16 |