| 11212023 |
Systems and methods for nodes communicating using a time-synchronized transport layer |
Michael Konstantinos Papamichael, Ang Li |
2021-12-28 |
| 11144286 |
Generating synchronous digital circuits from source code constructs that map to circuit implementations |
Blake D. Pelton |
2021-10-12 |
| 11113176 |
Generating a debugging network for a synchronous digital circuit during compilation of program source code |
Blake D. Pelton |
2021-09-07 |
| 11106437 |
Lookup table optimization for programming languages that target synchronous digital circuits |
Blake D. Pelton |
2021-08-31 |
| 11108894 |
Masked packet checksums for more efficient digital communication |
Michael Konstantinos Papamichael |
2021-08-31 |
| 11093682 |
Language and compiler that generate synchronous digital circuits that maintain thread execution order |
Blake D. Pelton |
2021-08-17 |
| 10977104 |
Partially reconfiguring acceleration components |
Derek Chiou, Sitaram V. Lanka, Andrew R. Putnam, Douglas C. Burger |
2021-04-13 |
| 10958717 |
Hardware implemented load balancing |
Eric S. Chung, Michael Konstantinos Papamichael, Douglas C. Burger, Shlomi Alkalay |
2021-03-23 |
| 10922250 |
Monitoring and steering service requests to acceleration components |
Michael Konstantinos Papamichael, Alexey Lavrov |
2021-02-16 |
